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SH7727 Datasheet(PDF) 22 Page - Renesas Technology Corp

Part # SH7727
Description  Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series
PDF  1109 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7727 Datasheet(HTML) 22 Page - Renesas Technology Corp

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Rev. 5.00 Dec 12, 2005 page xxii of lxxii
Page
Previous Version
Revised Version
826
26.3.4 Port D Control Register (PDCR)
Bit (2n + 1)
Bit 2n
PDnMD1
PDnMD0
Pin Function
0
0
Other function (see table 26.1)
0
1
Port output (n = value other than 4 or 6), reserved (n = 4 or 6)
1
0
Port input (Pullup MOS: on)
1
1
Port input (Pullup MOS: off)
Bit (2n + 1)
Bit 2n
PDnMD1
PDnMD0
Pin Function
0
0
Other function (see table 26.1)
0
1
Port output (n = value other than 4 or 6), reserved (n = 4 or 6)
1
0
Port input (Pullup MOS: on)
(Initial value)
1
1
Port input (Pullup MOS: off)
838
26.3.13 SC Port Control Register
(SCPCR)
Bits 5, 4—SCP2 Mode 1, 0 (SCP2MD1,
SCP2MD0):
Bit 5
Bit 4
SCP2MD1
SCP2MD0
Pin Function
0
0
Transmit data output 1 (TxD1)
Receive data input 1 (RxD1)
(Initial value)
0
1
General output (SCPT[2] output pin)
Receive data input 1 (RxD1)
1
0
SCPT[2] input pin pullup (input pin)
Transmit data output 1 (TxD1)
1
1
General input (SCPT[2] input pin)
Transmit data output 1 (TxD1)
Note:
There is no combination of simultaneous I/O of SCPT[2] because one bit (SCP2DT) is
accessed using two pins of TxD1 and RxD1.
When the port input is set (bit SCPnMD1 is set to 1) and when the TE bit in SCSCR is set to 1, the
TxD1 pin is in the output state. When the TE bit is cleared to 0, the TxD1 pin is in the high-
impedance state.
Bit 5
Bit 4
SCP2MD1
SCP2MD0
Pin Function
0
0
Transmit data output 1 (TxD_SiO)
Receive data input 1 (RxD_SiO)
(Initial value)
0
1
General output (SCPT[2] output pin)
Receive data input 1 (RxD_SiO)
1
0
SCPT[2] input pin pullup (input pin)
Transmit data output 1 (TxD_SiO)
1
1
General input (SCPT[2] input pin)
Transmit data output 1 (TxD_SiO)
Note:
There is no combination of simultaneous I/O of SCPT[2] because one bit (SCP2DT) is
accessed using two pins of TxD_SiO and RxD_SiO.
When the port input is set (bit SCPnMD1 is set to 1) and when the TE bit in SCSCR is set to 1, the
TxD_SiO pin is in the output state. When the TE bit is cleared to 0, the TxD_SiO pin is in the
high-impedance state.
909
30.3.3 Usage Notes
Setting procedure when Using PC Card
Controller:
1. Set bit 0 (A6PCM) in bus control register
1 (BCR1) in the bus state controller to 1.
2. Set bit 4 (P0USE) in the area 6 general
control register in the PC card controller to
1.
3. Set the pin function controller to custom
PC card pin functions (“other functions”).
1. Drive pin
ASEMD0 high.
2. Set bit 0 (A6PCM) in bus control register
1 (BCR1) in the bus state controller to 1.
3. Set bit 4 (P0USE) in the area 6 general
control register in the PC card controller to
1.
4. Set the pin function controller to custom
PC card pin functions (“other functions”).



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