SH7052 datasheet(135/919 Pages) RENESAS

135 / 919 page

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7.3.2

Break on On-Chip Memory Instruction Fetch Cycle

On-chip memory (on-chip ROM and/or RAM) is always accessed as 32 bits in one bus cycle.

Therefore, two instructions can be retrieved in one bus cycle when fetching instructions from on-

chip memory. At such times, only one bus cycle is generated, but by setting the start addresses of

both instructions in the user break address register (UBAR) it is possible to cause independent

breaks. In other words, when wanting to effect a break using the latter of two addresses retrieved

in one bus cycle, set the start address of that instruction in UBAR. The break will occur after

execution of the former instruction.

7.3.3

Program Counter (PC) Values Saved

Break on Instruction Fetch: The program counter (PC) value saved to the stack in user break

interrupt exception processing is the address that matches the break condition. The user break

interrupt is generated before the fetched instruction is executed. If a break condition is set in an

instruction fetch cycle placed immediately after a delayed branch instruction (delay slot), or on an

instruction that follows an interrupt-disabled instruction, however, the user break interrupt is not

accepted immediately, but the break condition establishing instruction is executed. The user break

interrupt is accepted after execution of the instruction that has accepted the interrupt. In this case,

the PC value saved is the start address of the instruction that will be executed after the instruction

that has accepted the interrupt.

Break on Data Access (CPU/DMA): The program counter (PC) value is the top address of the

next instruction after the last instruction executed before the user break exception processing

started. When data access (CPU/DMA) is set as a break condition, the place where the break will

occur cannot be specified exactly. The break will occur at the instruction fetched close to where

the data access that is to receive the break occurs.

SH7052 Datasheet(PDF) 135 Page - Renesas Technology Corp