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32170 Datasheet(PDF) 4 Page - Renesas Technology Corp |
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32170 Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 881 page  How to read internal I/O register tables ➀ Bit Numbers: Each register is connected with an internal bus of 16-bit wide, so the bit numbers of the registers located at even addresses are D0-D7, and those at odd addresses are D8-D15. ➁ State of Register at Reset: Represents the initial state of each register immediately after reset with hexadecimal numbers (undefined bits after reset are indicated each in column ➂.) ➂ At read: ... read enabled ? ... read disabled (read value invalid) 0 ... Read always as 0 1 ... Read always as 1 { At write: : Write enabled ∆ : Write enable conditionally (include some conditions at write) - : Write disabled (Written value invalid) Abit 12 34 D0 D Bit name Function W R <at reset: H'04> 0 Not assigned. 0 1 Abit (...................) 0: ----- 1: ----- 3 2 Not implemented in the shaded portion. <Example of representation> Bbit Cbit Bbit (...................) Cbit (...................) 0: ----- 1: ----- 0: ----- 1: ----- Registers represented with thick rectangles are accessible only with halfwords or words (not accessible with bytes). 1 2 3 4 |
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