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TLE2144MDWREP Datasheet(PDF) 17 Page - Texas Instruments |
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TLE2144MDWREP Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 22 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 17 34830 TYPICAL APPLICATIONS PCB LAYOUT CONSIDERATIONS The 34830 is a high-speed amplifier, and as such requires careful attention to be paid to the way in which boards are laid out, in order to guarantee best performance. All high-speed layout techniques should be followed including the following points. 1. Minimize all trace inductances by reducing trace lengths. This is especially critical for the supply and ground lines as well as for the output line. Boards with multiple layers should have enough vias from the ground plane to the chip ground connection to further reduce inductance. 2. Make sure that a solid ground plane is available and run all traces above it. 3. Avoid traces with 90 degree bends. 4. Use a 0.1μF bypass capacitor in series with a 4.7 Ω resistor as close to the VCC and GND pins of the 34830 as possible. Include a 10μF bypass capacitor at the location on the board where VCC and GND are connected to the external world. 5. Try to refer all ground connections to the same point as in a star ground configuration. Usually this point is the middle point of the ground plane. THERMAL CONSIDERATIONS Make sure that the thermal dissipation ratings for the 34830 package are not violated in the application at hand. The 34830 comes in a package with an exposed pad (EP). The primary function of the EP is to serve as an effective way to dissipate heat away from the inside of the package. Take full advantage of this feature and connect the EP to a surface or plane that can act as a heat sink. The EP is electrically connected to ground. Make sure that the heat sink is also connected to the same potential. If multiple heat generating components are used in the application, distribute these evenly throughout the board, so as not to create hot spots with large temperature gradients that could violate power and heat dissipation ratings. POWER DISSIPATION Care must be taken not to exceed the maximum die junction temperature of the 34830. The die junction temperature can be calculated through the formula: Where PDISS is the average power dissipation of the device which can be calculated as PDISS = VCC*(ICC + VOUT(RMS)2/RLOAD). EN 1 E-Switch Switch SPDT SPDT, EG1218 Y VCC 1 2POL254 Phoenix Connector Termblock2_MKD MKDSN1.5/2, 2 pin Terminal block 2 Diga- key, 5.0mm, 90 deg wire to pin, Stock number - 277-1236-ND Y Freescale does not assume liability, endorse, or warrant components from external manufacturers that are referenced in circuit drawings or tables. While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their application. Table 5. 34830 Bill of Material Item Qty Part Description Value/Rating Part Number/Manufacturer Install TJ TA PDISS θJA × + = |
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