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THS4012CD Datasheet(PDF) 18 Page - Texas Instruments |
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THS4012CD Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 30 page ![]() THS4011, THS4012 290-MHz LOW-DISTORTION HIGH-SPEED AMPLIFIERS SLOS216B – JUNE 1999 – FEBRUARY 2000 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: V OO + V IO 1 ) R F R G " I IB ) R S 1 ) R F R G " I IB– R F + – VI + RG RS RF IIB– VO IIB+ Figure 29. Output Offset Voltage Model optimizing unity gain response Internal frequency compensation of the THS401x was selected to provide very wideband performance yet still maintain stability when operated in a noninverting unity gain configuration. When amplifiers are compensated in this manner there is usually peaking in the closed loop response and some ringing in the step response for very fast input edges, depending upon the application. This is because a minimum phase margin is maintained for the G=+1 configuration. For optimum settling time and minimum ringing, a feedback resistor of 100 Ω should be used as shown in Figure 30. Additional capacitance can also be used in parallel with the feedback resistance if even finer optimization is required. _ + THS401x 100 Ω Input Output Figure 30. Noninverting, Unity Gain Schematic |
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