TMS320VC5409GGU datasheet(18/89 Pages) TI

18 / 89 page

Functional Overview

April 1999 − Revised February 2004

SPRS082E

Table 3−3. Bank-Switching Control Register Fields

BIT

RESET

FUNCTION

NO.

NAME

RESET

VALUE

FUNCTION

15−12

BNKCMP

1111

Bank compare. BNKCMP determines the external memory-bank size. BNKCMP is used to mask the four

MSBs of an address. For example, if BNKCMP = 1111b, the four MSBs (bits 12−15) are compared, resulting

in a bank size of 4K words. Bank sizes of 4K words to 64K words are allowed.

PS-DS

Program read − data read access. PS-DS inserts an extra cycle between consecutive accesses of program

read and data read or data read and program read.

PS-DS = 0

No extra cycles are inserted by this feature.

PS-DS = 1

One extra cycle is inserted between consecutive data and program reads.

10−3

Reserved

These bits are reserved and are unaffected by writes.

HPI bus holder. HBH controls the HPI bus holder feature. HBH is cleared to 0 at reset

8-bit Mode

HBH = 0

The bus holder is disabled for the HPI data bus (HD[7:0]).

HBH = 1

The bus holders are enabled on HD[7:0]. When not driven, the HPI data bus (HD[7:0]) is held

in the previous logic level.

HBH

HPI bus holder. HBH controls the HPI bus holder feature. HBH is cleared to 0 at reset

16-bit Mode

HBH = 0

The bus holder is disabled for the HPI address bus (HA[15:0]). The HPI GPIO pins (HD[7:0])

are held in the previous logic level.

HBH = 1

The bus holders are enabled on HA[15:0]. When not driven, the HPI address bus (A[15:0])

and HPI GPIO pins (HD[7:0]) are held in the previous logic level.

Bus holder. BH controls the data bus holder feature. BH is cleared to 0 at reset.

BH = 0

The bus holder is disabled.

BH = 1

The bus holder is enabled. When not driven, the data bus (D[15:0]) is held in the previous

logic level.

EXIO

External bus interface off. The EXIO bit controls the external bus-off function.

EXIO = 0

The external bus interface functions as usual.

EXIO = 1

The address bus, data bus, and control signals become inactive after completing the current

bus cycle. Note that the DROM, MP/MC, and OVLY bits in the PMST and the HM bit of ST1

cannot be modified when the interface is disabled.

TMS320VC5409GGU Datasheet(PDF) 18 Page - Texas Instruments

TMS320VC5409GGU Datasheet(HTML) 18 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

Datasheet Download

Link URL