TMS370CX2XFN datasheet(15/60 Pages) TI

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TMS370Cx2x

8-BIT MICROCONTROLLER

SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

interrupts (continued)

Table 8. Hardware System Interrupts

INTERRUPT SOURCE

INTERRUPT FLAG

SYSTEM

INTERRUPT

VECTOR

ADDRESS

PRIORITY†

External RESET

Watchdog Overflow

Oscillator Fault Detect

COLD START

WD OVRFL INT FLAG

OSC FLT FLAG

RESET‡

7FFEh, 7FFFh

External INT1

INT1 FLAG

INT1‡

7FFCh, 7FFDh

External INT2

INT2 FLAG

INT2‡

7FFAh, 7FFBh

External INT3

INT3 FLAG

INT3‡

7FF8h, 7FF9h

SPI RX/TX Complete

SPI INT FLAG

SPIINT

7FF6h, 7FF7h

Timer 1 Overflow

Timer 1 Compare 1

Timer 1 Compare 2

Timer 1 External Edge

Timer 1 Input-Capture

Watchdog Overflow

T1 OVRFL INT FLAG

T1C1 INT FLAG

T1C2 INT FLAG

T1EDGE INT FLAG

T1IC INT FLAG

WD OVRFL INT FLAG

T1INT§

7FF4h, 7FF5h

SCI RX Data Register Full

SCI RX Break Detect

RXRDY FLAG

BRKDT FLAG

RXINT‡

7FF2h, 7FF3h

SCI TX Data Register Empty

TXRDY FLAG

TXINT

7FF0h, 7FF1h

† Relative priority within an interrupt level.

‡ Releases microcontroller from STANDBY and HALT low-power modes.

§ Releases microcontroller from STANDBY low-power mode.

privileged operation and EEPROM write-protection override

The TMS370Cx2x family enables the designer to software-configure the system and peripherals to meet the

requirements of a broad variety of applications. The non-privileged mode of operation ensures the integrity of

the system configuration once defined for an end application. Following a hardware reset, the TMS370Cx2x

operates in the privileged mode where all peripheral file registers have unrestricted read/write access and the

application program configures the system during the initialization sequence following reset. As the last step

of system initialization, the PRIVILEGE DISABLE bit (SCCR2.0) is set to 1, causing the device to enter the

non-privileged mode, thus disabling write operations to specific configuration control bits within the peripheral

file. The system configuration bits listed in Table 9 are write-protected during the non-privileged mode and must

be configured by software prior to exiting the privileged mode.

TMS370CX2XFN Datasheet(PDF) 15 Page - Texas Instruments

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