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TMS370CX2XFN Datasheet(PDF) 26 Page - Texas Instruments |
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TMS370CX2XFN Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 60 page  TMS370Cx2x 8-BIT MICROCONTROLLER SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997 26 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 programmable timer 1 (continued) D Hard watchdog configuration (see Figure 9) for ’C722 EPROM and mask-ROM devices: – Eight different WD overflow rates ranging from 26.2 ms to 3.35 s at 5-MHz SYSCLK – A WD reset key (WDRST) register clears the watchdog counter (WDCNTR) when a correct value is written. – Generates a system reset if an incorrect value is written to the WDRST or if the counter overflows – A WD overflow flag (WD OVRFL INT FLAG) bit indicates whether the WD timer initiated a system reset. – Automatic activation of the WD timer upon power-up reset – INT1 is enabled as a nonmaskable interrupt during low power modes. 16-Bit Watchdog Counter Reset Prescaler Clock Watchdog Reset Key WD OVRFL TAP SEL System Reset T1CTL1.7 WDRST.7-0 WDCNTR.15-0 T1CTL2.5 WD OVRFL INT FLAG Figure 9. Hard Watchdog |
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