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LTC4160EPDC Datasheet(PDF) 23 Page - Linear Technology |
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LTC4160EPDC Datasheet(HTML) 23 Page - Linear Technology |
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23 / 32 page ![]() LTC4160/LTC4160-1 23 41601f APPLICATIONS INFORMATION current than is available will not cause the average input current limit to be violated. It will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal dissipa- tion within the charger. Battery Charger Stability Considerations The LTC4160/LTC4160-1’s battery charger contains both a constant-voltage and a constant-current control loop. The constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1μF from BAT to GND. High value, low ESR MLCCs reduce the constant-voltage loop phase margin, possibly resulting in instability. Up to 22μF may be used in parallel with a battery, but larger capacitors should be decoupled with 0.2Ω to 1Ω of series resistance. Furthermore, a 100μF capacitor in series with a 0.3Ω re- sistor from BAT to GND is required to prevent oscillation when the battery is disconnected. In constant-current mode, the PROG pin is in the feed- back loop rather than the battery voltage. Because of the additional pole created by any PROG pin capacitance, capacitance on this pin must be kept to a minimum. With no additional capacitance on the PROG pin, the charger is stable with program resistor values as high as 25k. However, additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 100kHz. Therefore, if the PROG pin has a parasitic capacitance, CPROG, the fol- lowing equation should be used to calculate the maximum resistance value for RPROG: R kHz C PROG PROG ≤ 1 2 100 π •• Alternate NTC Thermistors and Biasing The LTC4160/LTC4160-1 provide temperature qualified charging if a grounded thermistor and a bias resistor are connected to NTC. By using a bias resistor whose value is equal to the room temperature resistance of the thermistor (R25) the upper and lower temperatures are pre-programmed to approximately 40°C and 0°C respec- tively assuming a Vishay Curve 1 thermistor. The upper and lower temperature thresholds can be ad- justed by either a modification of the bias resistor value or by adding a second adjustment resistor to the circuit. If only the bias resistor is adjusted, then either the upper or the lower threshold can be modified but not both. The other trip point will be determined by the characteristics of the thermistor. Using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera- ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. Examples of each technique are given below. NTC thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. The Vishay-Dale thermistor NTHS0603N011-N1003F, used in the following examples, has a nominal value of 100k and follows the Vishay Curve 1 resistance-temperature characteristic. In the explanation below, the following notation is used. R25 = Value of the thermistor at 25°C RNTC|COLD = Value of the thermistor at the cold trip point RNTC|HOT = Value of the thermistor at the hot trip point rCOLD = Ratio of RNTC|COLD to R25 rHOT = Ratio of RNTC|HOT to R25 RNOM – Primary thermistor bias resistor (see Figure 7) R1 = Optional temperature range adjustment resistor (see Figure 8) The trip points for the LTC4160/LTC4160-1’s temperature qualification are internally programmed at 0.349 • NTCBIAS for the hot threshold and 0.765 • NTCBIAS for the cold threshold. |
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