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AS27C256-30ECAI Datasheet(PDF) 7 Page - Austin Semiconductor

Part # AS27C256-30ECAI
Description  256K UVEPROM UV Erasable Programmable Read-Only Memory
PDF  13 Pages
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Manufacturer  AUSTIN [Austin Semiconductor]
Direct Link  http://www.austinsemiconductor.com
Logo AUSTIN - Austin Semiconductor

AS27C256-30ECAI Datasheet(HTML) 7 Page - Austin Semiconductor

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UVEPROM
UVEPROM
UVEPROM
UVEPROM
UVEPROM
AS27C256
AS27C256
Rev. 2.0 7/06
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
Austin Semiconductor, Inc.
NOTES:
1.Timing measurements are made at 2V for logic high and 0.8V for logic low (see figure 2).
2. Common test conditions apply for t
dis
except during programming.
3. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested.
SWITCHING CHARACTERISTICS FOR PROGRAMMING: V
CC = 6.5V and VPP = 12.75V (AMD
FLASHRITE ALGO), T
A = 25°C
CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERAT-
ING FREE-AIR TEMPERATURE, f = 1MHz*
* Capacitance measurements are made on a sample basis only.
** Typical values are at T
A
= 25°C and nominal voltages.
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLT-
AGE AND OPERATING FREE-AIR TEMPERATURE1,2
TEST CONDITIONS
TYP**
MAX
UNIT
Ci
Input capacitance
VI = 0V
610
pF
Co
Output capacitance
VO = 0V
10
14
pF
PARAMETER
MIN MAX MIN MAX
ta(A)
Access time from address
120
150
ns
ta(E)
Access time from E\
120
150
ns
ten(G)R Output enable time from G\
40
50
ns
tdis
Disable time of output from G\ or E\,
whichever occurs first
3
0
30
0
30
ns
tv(A)
Output data valid time after change of
address, E\, or G\, whichever occurs first
3
00
ns
PARAMETER
-12
see Figure 2
-15
UNIT
TEST
CONDITIONS
1, 2
MIN MAX MIN MAX MIN MAX
ta(A)
Access time from address
170
200
250
ns
ta(E)
Access time from E\
170
200
250
ns
ten(G)R Output enable time from G\
50
60
60
ns
tdis
Disable time of output from G\ or E\,
whichever occurs first
3
040
0
50
060
ns
tv(A)
Output data valid time after change of
address, E\, or G\, whichever occurs first
3
000
ns
see Figure 2
-25
UNIT
TEST
CONDITIONS
1, 2
PARAMETER
-17
-20
MIN
MAX
UNIT
tdis(G) Output disable time from G\
0
130
ns
ten(G)W Output enable time from G\
150
ns
PARAMETER



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