ADC

ADC

ADC

ADC

ADC

AS1419

AS1419A

AS1419 & AS1419A

Rev. 1.5 08/09

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

5

Austin Semiconductor, Inc.

NOTES:

1. Absolute Maximum Ratings are those values beyond which

the life of a device may be impaired.

2. All voltage values are with respect to ground with DGND and

AGND wired together unless otherwise noted.

3. When these pin voltages are taken below V

SS

or above V

DD

,

they will be clamped by internal diodes. This product can handle

input currents greater than 100mA below V

SS

or above V

DD

without latchup.

4. When these pin voltages are taken below V

SS

, they will be

clamped by internal diodes. This product can handle input

currents greater than 100mA below V

SS

without latchup. These

pins are not clamped to V

DD

.

5. V

DD

= 5V, V

SS

= –5V, f

SAMPLE

= 800kHz, t

r

= t

f

= 5ns unless

otherwise specified.

6. Linearity, offset and full-scale specifications apply for a single

ended +A

IN

input with – A

IN

grounded.

7. Integral nonlinearity is defined as the deviation of a code

from a straight line passing through the actual endpoints of the

transfer curve. The deviation is measured from the center of

the quantization band.

8. Bipolar offset is the offset voltage measured from –0.5LSB

when the output code flickers between 0000 0000 0000 00 and

1111 1111 1111 11.

9. Guaranteed by design, not subject to test.

10. Recommended operating conditions.

11. The falling edge of CONVST\ starts a conversion. If

CONVST\ returns high at a critical point during the conversion

it can create small errors. For best performance ensure that

CONVST\ returns high either within 650ns after the start of the

conversion or after BUSY\ rises.

FUNCTIONAL BLOCK DIAGRAM