ADC

ADC

ADC

ADC

ADC

AS1419

AS1419A

AS1419 & AS1419A

Rev. 1.5 08/09

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

10

Austin Semiconductor, Inc.

Intermodulation Distortion

If the ADC input signal consists of more than one spectral

component, the ADC transfer function nonlinearity can pro-

duce intermodulation distortion (IMD) in addition to THD. IMD

is the change in one sinusoidal input caused by the presence of

another sinusoidal input at a different frequency.

If two pure sine waves of frequencies fa and fb are applied

to the ADC input, nonlinearities in the ADC transfer function

can create distortion products at the sum and difference

frequencies of mfa ±nfb, where m and n = 0, 1, 2, 3, etc. For

example, the 2nd order IMD terms include (fa + fb). If the two

input sine waves are equal in magnitude, the value (in decibels)

of the 2nd order IMD products can be expressed by the

following formula:

Peak Harmonic or Spurious Noise

The peak harmonic or spurious noise is the largest spectral

component excluding the input signal and DC. This value is

expressed in decibels relative to the RMS value of a full-scale

input signal.

Full-Power and Full-Linear Bandwidth

The full-power bandwidth is that input frequency at which

the amplitude of the reconstructed fundamental is reduced by

3dB for a full-scale input signal.

The full-linear bandwidth is the input frequency at which

the S/(N + D) has dropped to 77dB (12.5 effective bits). The

AS1419 has been designed to optimize input bandwidth,

allowing the ADC to undersample input signals with

frequencies above the converter’s Nyquist Frequency. The

noise floor stays very low at high frequencies; S/(N + D)

becomes dominated by distortion at frequencies far beyond

Nyquist.

Driving the Analog Input

The differential analog inputs of the AS1419 are easy to

drive. The inputs may be driven differentially or as a singleended

input (i.e., the –A

IN

input is grounded). The +A

IN

and –A

IN

inputs are sampled at the same instant. Any unwanted signal

that is common mode to both inputs will be reduced by the

common mode rejection of the sample-and-hold circuit. The

inputs draw only one small current spike while charging the

sample-and-hold capacitors at the end of conversion. During

conversion, the analog inputs draw only a small leakage

current. If the source impedance of the driving circuit is low,

then the AS1419 inputs can be driven directly. As source

impedance increases so will acquisition time (see Figure 6). For

minimum acquisition time with high source impedance, a buffer

amplifier should be used. The only requirement is that the

amplifier driving the analog input(s) must settle after the small

current spike before the next conversion starts (settling time

must be 200ns for full throughput rate).

FIGURE 6: t

Input Filtering

The noise and the distortion of the input amplifier and

other circuitry must be considered since they will add to the

AS1419 noise and distortion. The small-signal bandwidth of

the sample-and-hold circuit is 20MHz. Any noise or distortion

products that are present at the analog inputs will be summed

over this entire bandwidth. Noisy input circuitry should be

filtered prior to the analog inputs to minimize noise. A simple

1-pole RC filter is sufficient for many applications. For example,

Figure 7 shows a 1000pF capacitor from +A

IN

to ground and a

FIGURE 7: RC Input Filter