SC9RS08KA2 datasheet(31/134 Pages) FREESCALE

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Chapter 4 Memory

SC9RS08KA2 Series Data Sheet, Rev. 1

Freescale Semiconductor

3. Write any data to any Flash location, via the high page accessing window $00C0–$00FF. (Prior to

the data writing operation, the PAGESEL register must be configured correctly to map the high

page accessing window to the any Flash locations).

4. Wait for a time, tnvs.

5. Set the HVEN bit.

6. Wait for a time tme.

7. Clear the MASS bit.

8. Wait for a time, tnvh1.

9. Clear the HVEN bit.

10. After time, trcv, the memory can be accessed in read mode again.

11. Remove external VPP.

NOTE

Flash memory cannot be programmed or erased by software code executed

from Flash locations. To program or erase Flash, commands must be

executed from RAM or BDC commands. User code should not enter wait or

stop during an erase or program sequence.

These operations must be performed in the order shown, but other unrelated

operations may occur between the steps.

4.6.4

Security

The SC9RS08KA2 Series includes circuitry to help prevent unauthorized access to the contents of Flash

memory. When security is engaged, Flash is considered a secure resource. The RAM, direct-page registers,

and background debug controller are considered unsecured resources. Attempts to access a secure memory

location through the background debug interface, or whenever BKGDPE is set, are blocked (reads return

all 0s).

Security is engaged or disengaged based on the state of a nonvolatile register bit (SECD) in the FOPT

working FOPT register in high-page register space. A user engages security by programming the NVOPT

location, which can be done at the same time the Flash memory is programmed. Notice the erased state

(SECD = 1) makes the MCU unsecure. When SECD in NVOPT is programmed (SECD = 0), next time

the device is reset via POR, internal reset, or external reset, security is engaged. In order to disengage

security, mass erase must be performed via BDM commands and followed by any reset.

The separate background debug controller can still be used for registers and RAM access. Flash mass erase

is possible by writing to the Flash control register that follows the Flash mass erase procedure listed in

Section 4.6.3, “Flash Mass Erase Operation,” via BDM commands.

Security can always be disengaged through the background debug interface by following these steps:

1. Mass erase Flash via background BDM commands or RAM loaded program.

2. Perform reset and the device will boot up with security disengaged.

SC9RS08KA2 Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc