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SC9RS08KA2 Datasheet(PDF) 58 Page - Freescale Semiconductor, Inc |
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SC9RS08KA2 Datasheet(HTML) 58 Page - Freescale Semiconductor, Inc |
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58 / 134 page ![]() Chapter 8 Central Processor Unit (RS08CPUV1) SC9RS08KA2 Series Data Sheet, Rev. 1 58 Freescale Semiconductor Figure 8-1. CPU Registers In addition to the CPU registers, there are three memory mapped registers that are tightly coupled with the core address generation during data read and write operations. They are the indexed data register (D[X]), the index register (X), and the page select register (PAGESEL). These registers are located at $000E, $000F, and $001F, respectively. Figure 8-2. Memory Mapped Registers 8.2.1 Accumulator (A) This general-purpose 8-bit register is the primary data register for RS08 MCUs. Data can be read from memory into A with a load accumulator (LDA) instruction. The data in A can be written into memory with a store accumulator (STA) instruction. Various addressing mode variations allow a great deal of flexibility in specifying the memory location involved in a load or store instruction. Exchange instructions allow values to be exchanged between A and SPC high (SHA) and also between A and SPC low (SLA). Arithmetic, shift, and logical operations can be performed on the value in A as in ADD, SUB, RORA, INCA, DECA, AND, ORA, EOR, etc. In some of these instructions, such as INCA and LSLA, the value in A is the only input operand and the result replaces the value in A. In other cases, such as ADD and AND, there are two operands: the value in A and a second value from memory. The result of the arithmetic or logical operation replaces the value in A. Some instructions, such as memory-to-memory move instructions (MOV), do not use the accumulator. DBNZ also relieves A because it allows a loop counter to be implemented in a memory variable rather than the accumulator. During reset, the accumulator is loaded with $00. PC SPC CARRY ZERO 0 0 0 7 13 13 ACCUMULATOR A SHADOW PROGRAM COUNTER 87 PROGRAM COUNTER CCR C Z CONDITION CODE REGISTER 0 7 0 7 0 7 INDEXED DATA REGISTER D[X] (location $000E) INDEX REGISTER X (location $000F) PAGE SELECT REG PAGESEL (location $001F) |
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