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SC9RS08KA2 Datasheet(PDF) 105 Page - Freescale Semiconductor, Inc |
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SC9RS08KA2 Datasheet(HTML) 105 Page - Freescale Semiconductor, Inc |
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105 / 134 page ![]() Chapter 12 Development Support SC9RS08KA2 Series Data Sheet, Rev. 1 Freescale Semiconductor 105 12.5 RS08 BDC Commands BDC commands are sent serially from a host computer to the BKGD pin of the target MCU. All commands and data are sent MSB-first using a custom BDC communications protocol. Active background mode commands require that the target MCU is currently in the active background mode while non-intrusive commands may be issued at any time whether the target MCU is in active background mode or running a user application program. Table 12-2 shows all RS08 BDC commands, a shorthand description of their coding structure, and the meaning of each command. Coding Structure Nomenclature The following nomenclature is used in Table 12-2 to describe the coding structure of the BDC commands. Commands begin with an 8-bit command code in the host-to-target direction (most significant bit first) / = Separates parts of the command d = Delay 16 to 511 target BDC clock cycles soft-reset = Delay of at least 512 BDC clock cycles from last host falling-edge AAAA = 16-bit address in the host-to-target direction1 RD = Eight bits of read data in the target-to-host direction WD = Eight bits of write data in the host-to-target direction RD16 = 16 bits of read data in the target-to-host direction WD16 = 16 bits of write data in the host-to-target direction SS = the contents of BDCSCR in the target-to-host direction (STATUS) CC = Eight bits of write data for BDCSCR in the host-to-target direction (CONTROL) RBKP = 16 bits of read data in the target-to-host direction (from BDCBKPT breakpoint register) WBKP = 16 bits of write data in the host-to-target direction (for BDCBKPT breakpoint register) 15 14 13 12 11 10 9 8765 4321 0 R0 0 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 W Any Reset 0 0000 0000 000 0000 = Unimplemented or Reserved Figure 12-7. BDC Breakpoint Match Register (BDCBKPT) 1. The RS08 CPU uses only 14 bits of address and occupies the lower 14 bits of the 16-bit AAAA address field. The values of address bits 15 and 14 in AAAA are truncated and thus do not matter. |
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