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ICS8430-62 Datasheet(PDF) 17 Page - Integrated Device Technology

Part # ICS8430-62
Description  500MHz, Crystal-to-3.3V, 2.5V Differential LVPECL Frequency Synthesizer
PDF  23 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS8430-62 Datasheet(HTML) 17 Page - Integrated Device Technology

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ICS8430-62 Datasheet
500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS8430AY-62 REVISION A JULY 2, 2009
17
©2009 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8430-62.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8430-62 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 130mA = 450.45mW
•
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power_MAX (3.3V, with all outputs switching) = 450.45mW + 60mW = 510.45mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 65.7°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.510W * 65.7°C/W = 103.5°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 8. Thermal Resistance θJA for 32 Lead LQFP, Forced Convection
θ
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
65.7°C/W
55.9°C/W
52.4°C/W



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