ICS8430-62 Datasheet

500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

ICS8430AY-62 REVISION A JULY 2, 2009

9

©2009 Integrated Device Technology, Inc.

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is

mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium

has been reached under these conditions.

See Parameter Measurement Information section.

NOTE 1: Jitter performance using XTAL inputs.

NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Output Frequency

20.83

500

MHz

tjit(cc)

Cycle-to-Cycle Jitter;

NOTE 1, 2

N

≠ 1.5

35

ps

N = 1.5

200

ps

tjit(per)

Period Jitter, RMS; NOTE 1

N

≠ 1.5

6

ps

tsk(o)

Output Skew; NOTE 2, 3

20

ps

Output Rise/Fall Time

20% to 80%

200

700

ps

Setup Time

M, N to nP_LOAD

5

ns

S_DATA to S_CLOCK

5

ns

S_CLOCK to S_LOAD

5

ns

Hold Time

M, N to nP_LOAD

5

ns

S_DATA to S_CLOCK

5

ns

S_CLOCK to S_LOAD

5

ns

odc

Output Duty Cycle

Even N Dividers

48

52

%

Odd N Dividers

43

57

%

PLL Lock time

10

ms