TLE8261E datasheet(49/82 Pages) INFINEON

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Data Sheet

Rev. 1.0, 2009-03-31

TLE8261E

Interrupt Function

11.1

Interrupt Description

The interrupt pin has a general purpose function to point out to the microcontroller either a wake up, a failure

condition or the switch on of a voltage regulator. Table 9 shows the possible interrupt sources in the device, and

Figure 22 gives the hardware set-up. The interrupt function is designed to inform the microcontroller of any wake-

up event, overtemperature or overtemperature pre-warning as well as other failures. These events turn the INT

pin to active LOW. All interrupt sources can be masked via a SPI bit, then no interrupt is generated for this event.

For failures on under-voltage the interrupt is dual-sensitive. This means that an interrupt is generated when the

failure appears, as well as when the failure disappears. For failures on over-temperature, communication failures

and voltage regulator over current and undervoltage, the dedicated SPI interrupt bit indicated first the interrupt

source and then the state of the device. So, the bit is set to failure

1 at the event, and remains latched at least until

the microcontroller reads the bit. For the SBC failure (Wrong WD Setting, Reset, Fail SPI) and wake events, the

INT indicates only an event and the bit is cleared with a dedicated SPI read.

The INT pin is released when an SPI read is done to Interrupt Register 000 with a “Read Only” command, or after

interrupt time out

INTTO. If the interrupt cause was a wake event, the interrupt bit can be read in Interrupt Register

000 and the bit is cleared. If it was an other interrupt source the bit INT is set, and interrupt register 001 and 010

need to be read. With a “Read Only“command the event triggered interrupt bits are cleared. The INT bit will be set

to “0” when all bits in interrupt register 001 and 010 are set to “0”. If an interrupt is masked (bit set to “0”) only the

interrupt does not occur, the interrupt bit in the SPI is shown.

Figure 22 shows a simplified diagram of the INT output. In Init Mode before RO goes high the INT pin is used to

set the configuration of the device to config 1/3 or config 2/4, see Chapter 13.

Figure 22

Interrupt Block Diagram

Table 9

Interrupt sources

INT Activation

SPI bit

State

Temperature

Over temperature pre-warning VCC1µC

Rising

OTP

CC1µC

Event /

State

Over temperature VCC2

Rising

CC2

Over temperature HS CAN

Rising

OT HSCAN

Communication failure

CAN Failure

Rising

CAN Failure 1..0

CAN Bus

Event/

State

Voltage regulator

INTERRUPT BLOCK.VSD

Interrupt logic

INT

Time

out

cc 1µC

INT

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