AT89LP213 datasheet(97/98 Pages) ATMEL

97 / 98 page

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3538D–MICRO–10/09

AT89LP213/214

Table of Contents (Continued)

Programmable Watchdog Timer ........................................................... 58

20.1

Software Reset ................................................................................................59

Instruction Set Summary ...................................................................... 60

On-chip Debug System ......................................................................... 64

22.1

Physical Interface ............................................................................................64

22.2

Software Breakpoints ......................................................................................65

22.3

Limitations of On-chip Debug ..........................................................................65

Programming the Flash Memory .......................................................... 65

23.1

Physical Interface ............................................................................................66

23.2

Memory Organization ......................................................................................67

23.3

Command Format ............................................................................................68

23.4

Status Register ................................................................................................71

23.5

DATA Polling ...................................................................................................71

23.6

Flash Security ..................................................................................................71

23.7

User Configuration Fuses ................................................................................72

23.8

Programming Interface Timing ........................................................................73

Electrical Characteristics ...................................................................... 77

24.1

Absolute Maximum Ratings* ...........................................................................77

24.2

DC Characteristics ...........................................................................................77

24.3

Typical Characteristics ....................................................................................78

24.4

Clock Characteristics .......................................................................................84

24.5

Serial Peripheral Interface Timing ..................................................................85

24.6

Serial Port Timing: Shift Register Mode Test Conditions ................................87

24.7

Test Conditions ................................................................................................88

Ordering Information ............................................................................. 90

25.1

Green Package Option (Pb/Halide-free) ..........................................................90

Packaging Information .......................................................................... 91

26.1

14P3 – PDIP ....................................................................................................91

26.2

14X – TSSOP ..................................................................................................92

Revision History ..................................................................................... 93

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