AT89LP4052 datasheet(93/94 Pages) ATMEL

93 / 94 page

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3547J–MICRO–10/09

AT89LP2052/LP4052

Table of Contents (Continued)

19. Serial Peripheral Interface ..................................................................... 42

19.1 Normal Mode .......................................................................................................44

19.2 Enhanced Mode ..................................................................................................44

19.3 Serial Clock Generator ........................................................................................47

19.4 SPI Pin Configuration ..........................................................................................48

20. Analog Comparator ............................................................................... 49

20.1 Comparator Interrupt with Debouncing ...............................................................49

21. Programmable Watchdog Timer ........................................................... 51

22. Instruction Set Summary ...................................................................... 52

23. Programming the Flash Memory .......................................................... 57

23.1 Programming Command Summary .....................................................................58

23.2 Status Register ....................................................................................................59

23.3 DATA Polling .......................................................................................................59

23.4 Parallel Programming ..........................................................................................59

23.5 In-System Programming (ISP) ............................................................................73

24. Electrical Characteristics ...................................................................... 78

24.1 Absolute Maximum Ratings* ...............................................................................78

24.2 DC Characteristics ..............................................................................................79

24.3 Serial Peripheral Interface Timing ......................................................................80

24.4 External Clock Drive ............................................................................................82

24.5 Serial Port Timing: Shift Register Mode ..............................................................83

24.6 Test Conditions ...................................................................................................83

25. Ordering Information ............................................................................. 85

25.1 Green Package Option (Pb/Halide-free) .............................................................85

26. Packaging Information .......................................................................... 86

26.1 20P3 – PDIP ........................................................................................................86

26.2 20S2 – SOIC ......................................................................................................87

26.3 20X – TSSOP ......................................................................................................88

27. Revision History ..................................................................................... 89

AT89LP4052 Datasheet(PDF) 93 Page - ATMEL Corporation