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ATmega16M1 Datasheet(PDF) 71 Page - ATMEL Corporation |
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ATmega16M1 Datasheet(HTML) 71 Page - ATMEL Corporation |
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71 / 365 page  71 7647F–AVR–04/09 ATmega16/32/64/M1/C1 • PCINT0/MISO/PSCOUT2A – Bit 0 MISO, Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a master, this pin is configured as an input regardless of the setting of DDB0. When the SPI is enabled as a slave, the data direction of this pin is controlled by DDB0. When the pin is forced to be an input, the pull-up can still be controlled by the PORTB0 and PUD bits. PSCOUT2A, Output 2A of PSC. PCINT0, Pin Change Interrupt 0. Table 9-4 and Table 9-5 relates the alternate functions of Port B to the overriding signals shown in Figure 9-5 on page 67. Table 9-4. Overriding Signals for Alternate Functions in PB7..PB4 Signal Name PB7/ADC4/ PSCOUT0B/SCK/ PCINT7 PB6/ADC7/ PSCOUT1B/ PCINT6 PB5/ADC6/ INT2/ACMPN1/ AMP2-/PCINT5 PB4/AMP0+/ PCINT4 PUOE SPE • MSTR • SPIPS 00 0 PUOV PB7 • PUD • SPIPS 00 0 DDOE SPE • MSTR • SPIPS + PSCen01 PSCen11 0 0 DDOV PSCen01 1 0 0 PVOE SPE • MSTR • SPIPS PSCen11 0 0 PVOV PSCout01 • SPIPS + PSCout01 • PSCen01 • SPIPS + PSCout01 • PSCen01 • SPIPS PSCOUT11 0 0 DIEOE ADC4D ADC7D ADC6D + In2en AMP0ND DIEOV 0 0 In2en 0 DI SCKin • SPIPS • ireset ICP1B INT2 AIO ADC4 ADC7 ADC6 AMP0+ Table 9-5. Overriding Signals for Alternate Functions in PB3..PB0 Signal Name PB3/AMP0-/ PCINT3 PB2/ADC5/INT1/ ACMPN0/PCINT2 PB1/MOSI/ PSCOUT2B/ PCINT1 PB0/MISO/ PSCOUT2A/ PCINT0 PUOE 00–– PUOV 00–– DDOE 00–– DDOV 00–– PVOE 00–– PVOV 00–– DIEOE AMP0ND ADC5D + In1en 0 0 DIEOV 0 In1en 0 0 DI INT1 MOSI_IN • SPIPS • ireset MISO_IN • SPIPS • ireset AIO AMP0- ADC5 – – |
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