ATmega16M1 datasheet(60/365 Pages) ATMEL

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7647F–AVR–04/09

ATmega16/32/64/M1/C1

0xC03

out

SPL,r16

0xC04

sei

; Enable interrupts

0xC05

<instr>

xxx

When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL

bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general

program setup for the Reset and Interrupt Vector Addresses in ATmega16/32/64/M1/C116/32 is:

Address Labels Code

Comments

;

.org 0xC00

0xC00

jmp

RESET

; Reset handler

0xC02

jmp

ANA_COMP_0

; Analog Comparator 0 Handler

0xC04

jmp

ANA_COMP_1

; Analog Comparator 1 Handler

...

;

0xC3C

jmp

SPM_RDY

; Store Program Memory Ready Handler

;

0xC3E

RESET: ldi

r16,high(RAMEND); Main program start

0xC3F

out

SPH,r16

; Set Stack Pointer to top of RAM

0xC40

ldi

r16,low(RAMEND)

0xC41

out

SPL,r16

0xC42

sei

; Enable interrupts

0xC43

<instr>

xxx

8.1.1

Moving Interrupts Between Application and Boot Space

The MCU Control Register controls the placement of the Interrupt Vector table.

8.1.2

MCU Control Register – MCUCR

• Bit 1 – IVSEL: Interrupt Vector Select

When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash

memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot

Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-

mined by the BOOTSZ Fuses. Refer to the section “Boot Loader Support – Read-While-Write

Self-Programming ATmega16/32/64/M1/C1” on page 279 for details. To avoid unintentional

changes of Interrupt Vector tables, a special write procedure must be followed to change the

IVSEL bit:

Write the Interrupt Vector Change Enable (IVCE) bit to one.

Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.

Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled

in the cycle IVCE is set, and they remain disabled until after the instruction following the write to

IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status

Bit

6543

210

SPIPS

–

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

0000

000

ATmega16M1 Datasheet(PDF) 60 Page - ATMEL Corporation

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