ATtiny261A datasheet(137/292 Pages) ATMEL

137 / 292 page

137

8197A–AVR–10/09

ATtiny261A/461A/861A

14.2 Register Description

14.2.1

ACSRA – Analog Comparator Control and Status Register A

• Bit 7 – ACD: Analog Comparator Disable

When this bit is written logic one, the power to the analog comparator is switched off. This bit

can be set at any time to turn off the analog comparator, thus reducing power consumption in

Active and Idle mode. When changing the ACD bit, the analog comparator Interrupt must be dis-

abled by clearing the ACIE bit in ACSRA. Otherwise an interrupt can occur when the bit is

changed.

• Bit 6 – ACBG: Analog Comparator Bandgap Select

When this bit is set an internal 1.1V reference voltage replaces the positive input to the analog

comparator. The selection of the internal voltage reference is done by writing the REFS2:0 bits

in ADCSRB and ADMUX registers. When this bit is cleared, AIN0, AIN1 or AIN2 depending on

the ACM2:0 bits is applied to the positive input of the analog comparator.

• Bit 5 – ACO: Analog Comparator Output

Enables output of analog comparator. The output of the analog comparator is synchronized and

then directly connected to ACO. The synchronization introduces a delay of 1 - 2 clock cycles.

• Bit 4 – ACI: Analog Comparator Interrupt Flag

This bit is set by hardware when a comparator output event triggers the interrupt mode defined

by ACIS1 and ACIS0. The analog comparator interrupt routine is executed if the ACIE bit is set

and the I-bit in SREG is set. ACI is cleared by hardware when executing the corresponding inter-

rupt handling vector. Alternatively, ACI is cleared by writing a logic one to the flag.

• Bit 3 – ACIE: Analog Comparator Interrupt Enable

When the ACIE bit is written logic one and the I-bit in the status register is set, the analog com-

parator interrupt is activated. When written logic zero, the interrupt is disabled.

• Bit 2 – ACME: Analog Comparator Multiplexer Enable

When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the

ADC multiplexer selects the negative input to the analog comparator. When this bit is written

logic zero, AIN1 is applied to the negative input of the analog comparator. For a detailed descrip-

tion of this bit, see Table 14-1 on page 135.

Bit

76543210

0x08 (0x28)

ACD

ACBG

ACO

ACI

ACIE

ACME

ACIS1

ACIS0

ACSRA

Read/Write

R/W

Initial Value

N/A

00000

ATtiny261A Datasheet(PDF) 137 Page - ATMEL Corporation

ATtiny261A Datasheet(HTML) 137 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL