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LPC1313 Datasheet(PDF) 14 Page - NXP Semiconductors |
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LPC1313 Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 53 page ![]() LPC1311_13_42_43_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 11 December 2009 14 of 53 NXP Semiconductors LPC1311/13/42/43 32-bit ARM Cortex-M3 microcontroller [1] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis. [2] I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus. [3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input. When configured as a ADC input, digital section of the pad is disabled, and the pin is not 5 V tolerant. [4] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode only). [5] Tie together VDD(3V3) and VDD(IO) externally. If separate supplies are used for VDD(3V3) and VDD(IO), ensure that the voltage difference between both supplies is smaller than or equal to 0.5 V. [6] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded (grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating. 7. Functional description 7.1 Architectural overview The ARM Cortex-M3 includes three AHB-Lite buses: the system bus, the I-code bus, and the D-code bus (see Figure 1). The I-code and D-code core buses are faster than the system bus and are used similarly to TCM interfaces: one bus dedicated for instruction fetch (I-code) and one bus for data access (D-code). The use of two core buses allows for simultaneous operations if concurrent operations target different devices. 7.2 ARM Cortex-M3 processor The ARM Cortex-M3 is a general purpose, 32-bit microprocessor, which offers high performance and very low power consumption. The ARM Cortex-M3 offers many new features, including a Thumb-2 instruction set, low interrupt latency, hardware divide, PIO1_10/AD6/ CT16B1_MAT1 20[3] I/O PIO1_10 — General purpose digital input/output pin. I AD6 — A/D converter, input 6. O CT16B1_MAT1 — Match output 1 for 16-bit timer 1. PIO1_11/AD7 27[3] I/O PIO1_11 — General purpose digital input/output pin. I AD7 — A/D converter, input 7. PIO2_0/DTR 1[1] I/O PIO2_0 — General purpose digital input/output pin. O DTR — Data Terminal Ready output for UART. PIO3_2 28[1] I/O PIO3_2 — General purpose digital input/output pin. PIO3_4 13[1] I/O PIO3_4 — General purpose digital input/output pin (LPC1311/13 only). PIO3_5 14[1] I/O PIO3_5 — General purpose digital input/output pin (LPC1311/13 only). USB_DM 13[4] I/O USB_DM — USB bidirectional D − line (LPC1342/43 only). USB_DP 14[4] I/O USB_DP — USB bidirectional D+ line (LPC1342/43 only). VDD(IO) 6[5] I 3.3 V input/output supply voltage. VDD(3V3) 29[5] I 3.3 V supply voltage to the internal DC-DC converter and the ADC. Also used as the ADC reference voltage. XTALIN 4[6] I Input to the oscillator circuit and internal clock generator circuits. Input voltage must not exceed 1.8 V. XTALOUT 5[6] O Output from the oscillator amplifier. VSS 33 - Thermal pad. Connect to ground. Table 4. LPC1311/13/42/43 HVQFN33 pin description table …continued Symbol Pin Type Description |
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