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AS3525 Datasheet(PDF) 170 Page - ams AG |
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AS3525 Datasheet(HTML) 170 Page - ams AG |
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170 / 194 page ![]() AS3525-A/-B C22O22 Data Sheet, Confidential © 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.13 170 - 194 Addr Name D<7> D<6> D<5> D<4> D<3> D<2> D<1> D<0> - DAC_Mute _off - DAL_Vol<4:0> Gain from DAC_Out to Mixer_In= (-40.5dB … +6dB) 0Fh DAC_L 0 0 0 0 0 0 0 0 ADCmux<1:0> - ADR_Vol<4:0> Gain from ADCMux_Out to ADC_In= (-34.5dB … +12dB) 10h ADC_R 0 0 0 0 0 0 0 0 AD_FS2 ADC_Mute _off - ADL_Vol<4:0> Gain from ADCMux_Out to ADC_In= (-34.5dB … +12dB) 11h ADC_L 0 0 0 0 0 0 0 0 ADC_on SUM_on DAC_on LOUT_on LIN2_on LIN1_on MIC2_on MIC1_on 14h AudioSet1 0 0 0 0 0 0 0 0 BIAS_off DITH_off AGC_off IBR_DAC<1:0> LSP_LP IBR_LSP<1:0> 15h AudioSet2 0 0 0 0 0 0 0 0 - - - - - ZCU_OFF IBR_HPH HPCM_off 16h AudioSet3 0 0 0 0 0 0 0 0 - - - LDO6_on COMP_TH<1:0> SKIP_ENAB CP_5V_on 17h USB_UTIL 0 0 0 0 0 0 0 0 - - - CLK_OUT_mode<1:0> CLKOUT_drive<1:0> OSC_pd 1Dh CLOCK_OUT 0 0 0 0 0 0 0 0 Design_Version<3:0> PVDDp IOVDDp EnWDogPw dn PwrUPHld 20h SYSTEM 0 0 1 0 0 0 0 1 CP_SW CP_on LREG_C P_not DCDC3p<1:0> LREG_off CVDDp<1:0> 21h CVDD/DCDC3 0 0 0 0 0 0 0 0 TmpSup_ off CHGI<2:0> CHGV<2:0> CHG_off 22h CHARGER 0 0 0 0 0 0 0 0 - I_V15<4:0> 23h DCDC15 0 0 0 0 0 0 0 0 BVDD_Sup<2:0> JT_Sup<4:0> 24h SUPERVISOR 0 0 0 0 0 0 0 0 CHG tmphigh CHG endofch CHG status CHG changed USB status USB changed RVDD was low BVDD Is low 25h IRQ_ENRD0 0 0 0 0 0 0 0 0 JTEMP high LSP overcurr HPH overcurr I2S status I2S changed Mic2 connect Mic1 connect HeadPh Connect 26h IRQ_ENRD1 0 0 0 0 0 0 0 0 T_deb<1:0> IRQ_ActH igh IRQ_PushP ull Remote_Det 2 Remote_D et1 RTC_Updat e ADC_EndCo n 27h IRQ_ENRD2 0 0 0 0 0 0 0 0 VRTC<3:0> - RTC_ON OSC_ON 28h RTCV 0 0 1 0 0 0 1 1 IRQ_MIN TRTC<6:0> 29h RTCT 0 1 0 0 0 0 0 0 RTC<7:0> 2Ah RTC_0 0 0 0 0 0 0 0 0 RTC<15:8> 2Bh RTC_1 0 0 0 0 0 0 0 0 RTC<23:16> 2Ch RTC_2 0 0 0 0 0 0 0 0 RTC<31:24> 2Dh RTC_3 0 0 0 0 0 0 0 0 ADC_Source<3:0> - - ADC<9:8> 2Eh ADC_0 0 0 0 0 0 0 X X |
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