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S5LS20216BSPGETQ1R Datasheet(PDF) 13 Page - Texas Instruments

Part # S5LS20216BSPGETQ1R
Description  16/32-BIT RISC Flash Microcontroller
PDF  101 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

S5LS20216BSPGETQ1R Datasheet(HTML) 13 Page - Texas Instruments

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TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com
SPNS141 – MARCH 2010
2.2.5
Memory Auto-Initialization
This device allows some of the on-chip memories to be initialized via the memory hardware initialization
control registers in the System module. The purpose of having the hardware initialization is to program the
memory arrays with error detection capability to a known state based on their error detection scheme
(odd/even parity or ECC). The MINITGCR register enables the memory initialization sequence, and the
MSINENA register selects the memories that are to be initialized. Please refer to the Architecture chapter
of the Technical Reference Manual (TRM) for more information.
The mapping of the different memories to the specific bits in the MSINENA register is shown in the
following table.
Table 2-6. Memory Initialization
Connecting Module
Address Range
RAM Select
Base Address
Ending Address
RAM
0x08000000
0x0801FFFF
0
MIBSPIP5 RAM
0xFF0A0000
0xF0BFFFFF
12
MIBSPI3 RAM
0xFF0C0000
0xFF0DFFFF
11
MIBSPI1 RAM
0xFF0E0000
0xFF0FFFFF
7
DCAN3 RAM
0xFF1A0000
0xFF1BFFFF
10
DCAN2 RAM
0xFF1C0000
0xFF1DFFFF
6
DCAN1 RAM
0xFF1E0000
0xFF1FFFFF
5
Flexray RAM
RAM is not visible
9
MIBADC2 RAM
0xFF3A0000
0xFF3BFFFF
14
MIBADC1 RAM
0xFF3E0000
0xFF3FFFFF
8
NHET RAM
0xFF460000
0xFF47FFFF
3
HET TU RAM
0xFF4E0000
0xFF4FFFFF
4
DMA RAM
0xFFF80000
0xFFF80FFF
1
VIM RAM
0xFFF82000
0xFFF82FFF
2
Flexray TU RAM
0xFF500000
0xFF51FFFF
13
Copyright © 2010, Texas Instruments Incorporated
Device Overview
13
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Product Folder Link(s): TMS570LS20216 TMS570LS20206 TMS570LS10216 TMS570LS10206 TMS570LS10116
TMS570LS10106



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