MPC5200B_10 datasheet(56/72 Pages) FREESCALE

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MPC5200B Data Sheet, Rev. 4

Freescale Semiconductor

1.3.18

IEEE 1149.1 (JTAG) AC Specifications

Figure 46. Timing Diagram—JTAG Clock Input

Figure 47. Timing Diagram—JTAG TRST

Table 51. JTAG Timing Specification

Sym

Characteristic

Min

Max

Unit

SpecID

—

TCK frequency of operation.

MHz

A17.1

TCK cycle time.

—

A17.2

TCK clock pulse width measured at 1.5V.

1.08

—

A17.3

TCK rise and fall times.

A17.4

4TRST setup time to tck falling edge(1).

1 TRST is an asynchronous signal. The setup time is for test purposes only.

—

A17.5

5TRST assert time.

—

A17.6

Input data setup time(2).

2 Non-test, other than TDI and TMS, signal input timing with respect to TCK.

—

A17.7

Input data hold time(2)

—

A17.8

TCK to output data valid(3).

3 Non-test, other than TDO, signal output timing with respect to TCK.

030

A17.9

TCK to output high impedance(3).

A17.10

TMS, TDI data setup time.

—

A17.11

TMS, TDI data hold time.

—

A17.12

TCK to TDO data valid.

A17.13

TCK to TDO high impedance.

A17.14

TCK

VM = Midpoint Voltage

Numbers shown reference Table 51.

TCK

TRST

Numbers shown reference Table 51.

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