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WM8170 Datasheet(PDF) 20 Page - Wolfson Microelectronics plc |
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WM8170 Datasheet(HTML) 20 Page - Wolfson Microelectronics plc |
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20 / 41 page ![]() WM8170 Product Preview Rev 1.0 WOLFSON MICROELECTRONICS LTD PP Rev 1.0 March 2000 20 DIGITAL CORRECTION CIRCUITRY IN BASIC DC CORRECTION MODE The Digital Correction Circuitry that follows the ADC corrects for any difference between the actual ADC output code and the programmed TARGET value. During the period when the Digital Correction Circuitry is enabled, the circuit calculates the average digital error between the programmed TARGET value and the ADC output code, over a certain number of ADC conversions. This average digital error is subsequently subtracted from all ADC conversions until the Digital Correction Circuitry is enabled again. The number of ADC conversions that the Digital Correction Circuitry calculates the average over is programmable via the management interface. This number is set in the DIGDUR register, and is equal to 2 [DIGDUR] pixel periods. BIPOLAR OUTPUT 8-Bit DAC UP/DOWN COUNTER COMPARATOR 10-BIT ADC + - PGA Voltage level corresponding to ADC O/P TARGET code Output from Sample and Hold - + DIGITAL GAIN CONTROL CONTROL BLCENB 8 8-BIT DAC ANDUR[6:0] DIGDUR[2:0] DIGITAL ENABLE TO OUTPUT PINS D[9:0] + - 8 10 10 + - ADDER DIVIDE/ HOLD Average error between ADC O/P code and TARGET code during optically black pixels ANALOGUE ENABLE TARGET[7:0] STOPDC Figure 15 Basic DC Offset Correction Block Diagram BASIC DC OFFSET CORRECTION INITIATION AND TIMING The overall timing of the Basic DC correction algorithm is shown in Figure 16. The duration of the analogue and digital correction loops are independent. The user must ensure that the overall correction period, which is equal to the analogue loop enable time plus the Digital Correction Circuitry enable time, is no longer than the duration of the optically black pixels output from the CCD. This will prevent the potential error of active video being included in the digital average calculated within the WM8170, which would cause an incorrect error value to be stored. Applying a falling edge to the BLCENB digital input pin enables the Analogue loop and the Digital Correction Circuitry. Once the correction has been initiated, the internal WM8170 control circuitry runs until both the analogue and digital correction enables are complete. All issues associated with latency through the WM8170 have been considered in the internal controller design. BLCENB ANALOGUE LOOP ENABLED DIGITAL CORRECTION ENABLED PERIOD PROGRAMMABLE PERIOD PROGRAMMABLE OPTICALLY BLACK PIXELS Figure 16 Basic DC Correction Algorithm Timing |
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