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WM8170 Datasheet(PDF) 25 Page - Wolfson Microelectronics plc |
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WM8170 Datasheet(HTML) 25 Page - Wolfson Microelectronics plc |
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25 / 41 page ![]() WM8170 Product Preview Rev 1.0 WOLFSON MICROELECTRONICS LTD PP Rev 1.0 March 2000 25 CONTROLLING THE BLACK LEVEL CLAMP CIRCUITRY There are three Management Interface control bits that are associated with the INTBLCENB pulse generator, STPANAL, STPIIR, and PGAUPD. Their function is shown in Tables 6, 7 and 8: STPANAL FUNCTION 0 Allows the INTBLCENB signal to be steered to the Analogue DC correction Loop. 1 Disables the INTBLCENB signal from being steered to the Analogue DC correction Loop. The INTBLCENB pulses that would have been steered to the Analogue Enable are steered to the IIR Filter enable instead. Table 6 STPANAL control bit operation STPIIR FUNCTION 0 Allows the INTBLCENB signal to be steered to the IIR Filter 1 Disables the INTBLCENB signal from being steered to the IIR Filter Table 7 STPIIR control bit operation PGAUPD FUNCTION 0 The INTBLCENB signal will be steered to the Analogue DC correction loop as programmed on every frame. 1 The INTBLCENB signal will only be steered to the Analogue DC correction loop as programmed if the PGA gain register has been written to. Table 8 PGAUPD control bit operation The PGAUPD control bit enables the internal WM8170 circuitry to steer the INTBLCENB signals to the Analogue Control Loop for one frame only following a write to the PGA Gain register. The INTBLCENB signals will be steered to the IIR Filter on all other frames. This implies that there will only be ANLINE lines subject to line noise, only for a single video frame, and only if the PGA gain register has been written to. If the PGAUPD control bit has not been set, then the INTBLCENB signals will be steered to the Analogue Control Circuitry on every frame. SETTING THE IIR FILTER COEFFICIENT Writing to the COEFF register controls the IIR filter response. Table 9 shows the coefficients available on the WM8170, and the effective attenuation of the RMS noise during the optically black pixels that will be present on the calculated error. COEFF REGISTER VALUE IIR FILTER COEFF RMS Noise Attenuation (dB) RMS Noise Attenuation (Times) 10% 1.0% 0.1% 000 5 18.0 7.9 72 334 2307 001 6 21.0 11.3 146 673 4651 010 7 24.1 16.0 293 1352 9339 011 8 27.1 22.6 588 2709 18714 100 9 30.1 32.0 1177 5423 37466 101 10 33.1 45.2 2356 10853 74969 110 11 36.1 64.0 4714 21711 149976 111 12 39.1 90.5 9430 43427 299988 Table 9: IIR Filter Coefficients The 10%, 1.0% and 0.1% columns give the number of pixels that the IIR filter has to be enabled for to achieve the percentage settling, i.e. if the input has a 100LSB step then the number of pixels required for the filter to settle to 1LSB is equal to the number in the 1% column. For example, if the filter coefficient is set to 7, and the input has a 100LSB step, it will require 1352 enabled pixels for the filter to settle to 1LSB of the final error value. There is a trade-off between the number of pixels required for the filter to settle, and the RMS noise attenuation achieved on the calculated error value. |
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