X84041

3

Figure 1. Read Sequence

CE

OE

WE

I/O (IN)

"0"

RESET

LOAD ADDRESS

READ DATA

X

XXXXX

X A8

A7 A6 A5 A4 A3 A2 A1 A0

I/O (OUT)

2704 ILL F03

D7 D6 D5 D4 D3 D2 D1 D0

Write Sequence

A nonvolatile write sequence consists of sending a reset

sequence, a 16-bit address (the first 7 of which are don’t

cares), up to 8 bytes of data, and then a special “start

nonvolatile write cycle” command sequence. The reset

sequence is issued first (as described in the Reset

Sequence section) to set the internal write enable latch.

The address is written serially by issuing 16 separate

write cycles (

WE and CE LOW, OE HIGH) to the part

without any read cycles between the writes. The ad-

dress is sent serially, most significant bit first, on the l/O

pin. Up to eight bytes of data are written by issuing either

8, 16, 24, 32, 40, 48, 56, or 64 separate write cycles.

Again, no read cycles are allowed between writes. The

nonvolatile write cycle is initiated by issuing a special

read/write “1”/read sequence. The first read cycle ends

the page load, then the write “1” followed by a read starts

the nonvolatile write cycle. The X84041 recognizes 8-

byte pages beginning at addresses XXXXXX000. When

sending data to the part, attempts to exceed the upper

address of the page will result in the address counter

“wrapping-around” to the first address on the page,

where data loading can continue. For this reason, send-

ing more than 64 consecutive data bits will result in

overwriting previous data. A nonvolatile write cycle will

not start if a partial or incomplete write sequence is

issued. The internal write enable latch is reset when the

nonvolatile write cycle is completed to prevent inadvert-

ent writes. Note that this sequence is fully static, with no

special timing restrictions. The processor is free to

perform other tasks on the bus whenever the chip

enable pin (

CE) is HIGH.

Nonvolatile Write Status

The status of a nonvolatile write cycle can be determined

at any time by simply reading the state of the l/O pin on

the X84041. This pin is read when

OE and CE are LOW

and

WE is HIGH. During a nonvolatile write cycle the l/

O pin is LOW. When the nonvolatile write cycle is

complete, the l/O pin goes HIGH. A reset sequence can

also be issued during a nonvolatile write cycle with the

same result: I/O is LOW as long as a nonvolatile write

cycle is in progress, and l/O is HIGH when the nonvola-

tile write cycle is done.