TPIC83000IPWRQ1 datasheet(19/44 Pages) TI

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TPIC83000-Q1

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SLDS171 – NOVEMBER 2009

Table 11. Profile of Data Request Data Frames (Bank Mode Addressing) (continued)

FIELD NAME

FIELD

B7 (MSB)

B0 (LSB)

FRAME

(BANK

MODE

LENGTH

NO.

DATA

ADDRESS)

ADDRESS

ADC

TX RQ

ADC TMP(9)

ADC TMP(8)

ADC TMP(7)

ADC TMP(6)

ADC TMP(5)

ADC TMP(4)

ADC temperature

TMP(11)

TMP(10)

(11:0)

out

TX RQ

ADC TMP(3)

ADC TMP(2)

ADC TMP(1)

ADC TMP(0)

DIAG(1)

DIAG(0)

Calibration Mode – Data Write

Calibration Write Command Frames

PSNID(1)

PSNID(0)

WORDID

MODETYPE

DISPSN

PSNID(1)

PSNID(0)

WORDID

ADDR4

ADDR3

ADDR2

ADDR1

ADDR0

First Frame

PSNID[1:0]

Bits 7-6

Position ID of device on UART bus. Each device process information for one sensor. Four sensors can be

sensed on the UART bus. Position settings are defined in the EEPROM map.

Position 0

Position 1

Position 2

Position 3

WORDID

Bit 5

Frame ID of byte. 1 indicates frame 1 of 2.

MODETYPE

Bits 4-3

Select mode type within calibration mode

Data request

Calibration write

Calibration read

Mode select

DISPSN

Bit 2

Disable or enable position ID matching

Decode command only if position IDs match

Indicates global command. All devices decode command frame.

Reserved

Bits 1-0

Must be set to 0.

Second Frame

PSNID[1:0]

Bits 7-6

Position ID of device on UART bus. Each device process information for one sensor. Four sensors can be

sensed on the UART bus. Position settings are defined in the EEPROM map.

Position 0

Position 1

Position 2

Position 3

WORDID

Bit 5

Frame ID of byte. 0 indicates frame 2 of 2.

ADDR[4:0]

Bits 4-0

Address for bank or field mode addressing. See Table 3 for list of valid addresses.

Figure 9. Calibration Write Command Frames

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