74LVC3G17GD datasheet(2/18 Pages) NXP

2 / 18 page

74LVC3G17_6

Product data sheet

Rev. 06 — 6 June 2008

2 of 18

NXP Semiconductors

74LVC3G17

Triple non-inverting Schmitt trigger with 5 V tolerant input

Ordering information

Marking

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVC3G17DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC3G17DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC3G17GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

74LVC3G17GD

−40 °C to +125 °C

XSON8U

plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3

× 2 × 0.5 mm

SOT996-2

74LVC3G17GM

−40 °C to +125 °C

XQFN8U

plastic extremely thin quad ﬂat package; no leads;

8 terminals; UTLP based; body 1.6

× 1.6 × 0.5 mm

SOT902-1

Table 2.

Marking codes

Type number

Marking code

74LVC3G17DP

V17

74LVC3G17DC

V17

74LVC3G17GT

V17

74LVC3G17GD

V17

74LVC3G17GM

V17

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

001aah860

001aah861

Fig 3.

Logic diagram (one gate)

001aab109

74LVC3G17GD Datasheet(PDF) 2 Page - NXP Semiconductors

74LVC3G17GD Datasheet(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL