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P89LPC913 Datasheet(PDF) 42 Page - NXP Semiconductors |
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P89LPC913 Datasheet(HTML) 42 Page - NXP Semiconductors |
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42 / 66 page  P89LPC912_913_914_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 28 September 2007 42 of 66 NXP Semiconductors P89LPC912/913/914 8-bit microcontrollers with two-clock 80C51 core The SPI interface has four pins: SPICLK, MOSI, MISO, and SS: Fig 16. SPI block diagram (P89LPC912, P89LPC914) 8 BIT SHIFT REGISTER MISO P2.3 MOSI P2.2 SPICLK P2.5 SS P2.4 S S S M M M CLOCK LOGIC SPR0 SPR1 SELECT SPEN MSTR MSTR SPEN WCOL SPIF 002aaa497 CPU clock DIVIDER BY 4, 16, 64, 128 SPI CONTROL SPI STATUS REGISTER SPI interrupt request SPI clock master internal data bus SPI CONTROL REGISTER READ DATA BUFFER PIN CONTROL LOGIC clock Fig 17. SPI block diagram (P89LPC913) 8 BIT SHIFT REGISTER MISO P2.3 MOSI P2.2 SPICLK P2.5 S S S M M M CLOCK LOGIC SPR0 SPR1 SELECT SPEN MSTR MSTR SPEN WCOL SPIF 002aaa498 CPU clock DIVIDER BY 4, 16, 64, 128 SPI CONTROL SPI STATUS REGISTER SPI interrupt request SPI clock master internal data bus SPI CONTROL REGISTER READ DATA BUFFER PIN CONTROL LOGIC clock |
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