PCA9515DP datasheet(2/16 Pages) NXP

2 / 16 page

PCA9515_9

Product data sheet

Rev. 09 — 23 April 2009

2 of 16

NXP Semiconductors

PCA9515

I2C-bus repeater

I 5.5 V tolerant I2C-bus (SCLn, SDAn) and enable (EN) pins

I 0 Hz to 400 kHz clock frequency1

I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

I Packages offered: SO8 and TSSOP8 (MSOP8)

Ordering information

[1]

Also known as MSOP8.

3.1 Ordering options

Block diagram

The output pull-down of each internal buffer is set for approximately 0.5 V, while the input

threshold of each internal buffer is set about 0.07 V lower, when the output is internally

driven LOW. This prevents a lock-up condition from occurring.

The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.

Table 1.

Ordering information

Type number

Package

Name

Description

Version

PCA9515D

SO8

plastic small outline package; 8 leads;

body width 3.9 mm

SOT96-1

PCA9515DP

TSSOP8[1]

plastic thin shrink small outline package; 8 leads;

body width 3 mm

SOT505-1

Table 2.

Ordering options

Type number

Topside mark

Temperature range

PCA9515D

PCA9515

Tamb = −40 °C to +85 °C

PCA9515DP

9515

Tamb = −40 °C to +85 °C

Fig 1.

Block diagram of PCA9515

002aae620

PCA9515

SDA0

SCL0

SDA1

SCL1

VCC

GND

pull-up

resistor

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