HT48R02N datasheet(19/71 Pages) HOLTEK

19 / 71 page

HT46R01B/02B/01N/02N

HT48R01B/02B/01N/02N

Rev.1.10

February 12, 2010

· CTRL0 Register - HT48R01B/HT48R02B/HT48R01N/HT48R02N

Bit

76543210

Name

PFDCS

¾¾¾

PFDC

LXTLP

CLKMOD

R/W

¾¾¾

R/W

POR

¾¾¾

000

Bit 7

unimplemented, read as

²0²

Bit 6

PFDCS: PFD clock source

0: timer0

1: timer1

Bit 5~3

unimplemented, read as

²0²

Bit 2

PFDC: I/O or PFD

0: I/O

1: PFD

Bit 1

LXTLP: LXT oscillator low power control function

0: LXT Oscillator quick start-up mode

1: LXT Oscillator Low Power Mode

Bit 0

CLKMOD: system clock mode selection.

0: High speed - HIRC used as system clock

1: Low speed - LXT used as system clock, HIRC oscillator stopped.

These selections are only valid if the oscillator configuration options

have selected the HIRC+LXT.

· CTRL1 Register

Bit

76543210

Name

INTEG1

INTEG0

TBSEL1

TBSEL0

WDTEN3

WDTEN2

WDTEN1

WDTEN0

R/W

POR

10001010

Bit 7, 6

INTEG1, INTEG0: External interrupt edge type

00: disable

01: rising edge trigger

10: falling edge trigger

11: dual edge trigger

Bit 5, 4

TBSEL1, TBSEL0: Time base period selection

00: 2

10 ´ (1/fTP)

01: 2

11 ´ (1/fTP)

10: 2

12 ´ (1/fTP)

11: 2

13 ´ (1/fTP)

Bit 3~0

WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable

1010: WDT disabled

Other values: WDT enabled - Recommended value is 0101

If the

²watchdog timer enable² configuration option is selected, then the watchdog timer will

always be enabled and the WDTEN3~WDTEN0 control bits will have no effect.

Note:

The WDT is only disabled when both the WDT configuration option is disabled and when bits

WDTEN3~WDTEN0=1010.

The WDT is enabled when either the WDT configuration option is enabled or when bits

WDTEN3~WDTEN0

¹1010.

HT48R02N Datasheet(PDF) 19 Page - Holtek Semiconductor Inc

HT48R02N Datasheet(HTML) 19 Page - Holtek Semiconductor Inc

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