HT48R02N datasheet(40/71 Pages) HOLTEK

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HT46R01B/02B/01N/02N

HT48R01B/02B/01N/02N

Rev.1.10

February 12, 2010

Pulse Width Modulator

The device contains an 8-bit PWM function. Useful for

such applications such as motor speed control, the

PWM function provides outputs with a fixed frequency

but with a duty cycle that can be varied by setting partic-

ular values into the corresponding PWM register.

PWM Operation

A single register, known as PWMn and located in the

Data Memory is assigned to each Pulse Width Modula-

tor channel. It is here that the 8-bit value, which repre-

sents the overall duty cycle of one modulation cycle of

the output waveform, should be placed. To increase the

PWM modulation frequency, each modulation cycle is

subdivided into two or four individual modulation sub-

sections, known as the 7+1 mode or 6+2 mode respec-

tively. The required mode and the on/off control for each

PWM channel is selected using the CTRL0 register.

Note that when using the PWM, it is only necessary to

write the required value into the PWMn register and se-

lect the required mode setup and on/off control using the

CTRL0 register, the subdivision of the waveform into its

sub-modulation cycles is implemented automatically

within the microcontroller hardware. The PWM clock

source is the system clock fSYS. This method of dividing

the original modulation cycle into a further 2 or 4

sub-cycles enable the generation of higher PWM fre-

quencies which allow a wider range of applications to be

served. The difference between what is known as the

PWM cycle frequency and the PWM modulation fre-

quency should be understood. As the PWM clock is the

system clock, fSYS, and as the PWM value is 8-bits wide,

the overall PWM cycle frequency is fSYS/256. However,

when in the 7+1 mode of operation the PWM modulation

frequency will be fSYS/128, while the PWM modulation

frequency for the 6+2 mode of operation will be fSYS/64.

PWM

Modulation

PWM Cycle

Frequency

PWM Cycle

Duty

fSYS/64 for (6+2) bits mode

fSYS/128for (7+1) bits mode

fSYS/256

[PWM]/256

6+2 PWM Mode

Each full PWM cycle, as it is controlled by an 8-bit PWM

PWM mode, each PWM cycle is subdivided into four in-

dividual sub-cycles known as modulation cycle 0 ~ mod-

ulation cycle 3, denoted as i in the table. Each one of

these four sub-cycles contains 64 clock cycles. In this

mode, a modulation frequency increase of four is

achieved. The 8-bit PWM register value, which repre-

sents the overall duty cycle of the PWM waveform, is di-

vided into two groups. The first group which consists of

bit2~bit7 is denoted here as the DC value. The second

group which consists of bit0~bit1 is known as the AC

value. In the 6+2 PWM mode, the duty cycle value of

each of the four modulation sub-cycles is shown in the

following table.

Parameter

AC (0~3)

(Duty Cycle)

Modulation cycle i

(i=0~3)

i<AC

DC+1

³AC

6+2 Mode Modulation Cycle Values

The following diagram illustrates the waveforms associ-

ated with the 6+2 mode of PWM operation. It is impor-

tant to note how the single PWM cycle is subdivided into

4 individual modulation cycles, numbered from 0~3 and

how the AC value is related to the PWM value.

7+1 PWM Mode

Each full PWM cycle, as it is controlled by an 8-bit PWM

PWM mode, each PWM cycle is subdivided into two indi-

vidual sub-cycles known as modulation cycle 0 ~ modula-

tion cycle 1, denoted as i in the table. Each one of these

two sub-cycles contains 128 clock cycles. In this mode, a

modulation frequency increase of two is achieved. The

8-bit PWM register value, which represents the overall

duty cycle of the PWM waveform, is divided into two

groups. The first group which consists of bit1~bit7 is de-

noted here as the DC value. The second group which

consists of bit0 is known as the AC value. In the 7+1

PWM mode, the duty cycle value of each of the two mod-

ulation sub-cycles is shown in the following table.

Parameter

AC (0~1)

(Duty Cycle)

Modulation cycle i

(i=0~1)

i<AC

DC+1

128

³AC

128

7+1 Mode Modulation Cycle Values

The following diagram illustrates the waveforms associ-

ated with the 7+1 mode PWM operation. It is important

to note how the single PWM cycle is subdivided into 2 in-

dividual modulation cycles, numbered 0 and 1 and how

the AC value is related to the PWM value.

HT48R02N Datasheet(PDF) 40 Page - Holtek Semiconductor Inc

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