 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HT68F03 Datasheet(PDF) 76 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT68F03 Datasheet(HTML) 76 Page - Holtek Semiconductor Inc |
|
|
76 / 139 page  HT66F03/HT66F04/HT68F03/HT68F04 Rev. 1.00 76 April 16, 2010 Enhanced Type TM Register Description Overall operation of the Enhanced TM is controlled using a series of registers. A read only register pair exists to store the internal counter 10-bit value, while two read/write register pairs exist to store the internal 10-bit CCRA and CCRB value. The remaining three registers are control registers which setup the different operating and control modes as well as the three CCRP bits. Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 TM2C0 T2PAU T2CK2 T2CK1 T2CK0 T2ON T2RP2 T2RP1 T2RP0 TM2C1 T2AM1 T2AM0 T2AIO1 T2AIO0 T2AOC T2APOL T2CDN T2CCLR TM2C2 T2BM1 T2BM0 T2BIO1 T2BIO0 T2BOC T2BPOL T2PWM1 T2PWM0 TM2DL D7 D6 D5 D4 D3 D2 D1 D0 TM2DH ¾¾¾¾¾¾ D9 D8 TM2AL D7 D6 D5 D4 D3 D2 D1 D0 TM2AH ¾¾¾¾¾¾ D9 D8 TM2BL D7 D6 D5 D4 D3 D2 D1 D0 TM2BH ¾¾¾¾¾¾ D9 D8 10-bit Enhanced TM Register List · 10-bit Enhanced TM Register List - HT66F04 ¨ TM2C0 Register Bit 76543210 Name T2PAU T2CK2 T2CK1 T2CK0 T2ON T2RP2 T2RP1 T2RP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7 T2PAU: TM2 Counter Pause Control 0: run 1: pause The counter can be paused by setting this bit high. Clearing the bit to zero restores normal counter operation. When in a Pause condition the TM will remain powered up and continue to consume power. The counter will retain its residual value when this bit changes from low to high and resume counting from this value when the bit changes to a low value again. Bit 6~4 T2CK2~T2CK0: Select TM2 Counter clock 000: fSYS/4 001: fSYS 010: fH/16 011: fH/64 100: fTBC 101: Reserved 110: TCK2 rising edge clock 111: TCK2 falling edge clock These three bits are used to select the clock source for the TM. Selecting the Reserved clock input will effectively disable the internal counter. The external pin clock source can be chosen to be active on the rising or falling edge. The clock source fSYS is the system clock, while fH and fTBC are other internal clocks, the details of which can be found in the oscillator section. Bit 3 T2ON: TM2 Counter On/Off Control 0: Off 1: On This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting and turn off the TM which will reduce its power consumption. When the bit changes state from low to high the internal counter value will be reset to zero, however when the bit changes from high to low, the internal counter will retain its residual value until the bit returns high again. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
