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HT48R063 Datasheet(PDF) 23 Page - Holtek Semiconductor Inc

Part # HT48R063
Description  Enhanced I/O Type 8-Bit OTP MCU
PDF  94 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT48R063 Datasheet(HTML) 23 Page - Holtek Semiconductor Inc

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HT48R063/064/065/066/0662/067
Rev. 1.30
23
June 11, 2010
¨ HT48R0662/HT48R067
Bit
76543210
Name
PCFG
PFDCS
PWMSEL
PWMC1
PWMC0
PFDC
LXTLP
CLKMOD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
00000000
Bit 7
PCFG: pin-out remapping configuration
0: INT/TC0/PFD pin shared with PA3/PA2/PA1
1: INT/TC0/PFD pin shared with PB5/PB4/PB3
Bit 6
PFDCS: PFD clock source
0: timer0
1: timer1
Bit 5
PWMSEL: PWM type selection
0: 6+2
1: 7+1
Bit 4
PWMC1: I/O or PWM1 control
0: I/O
1: PWM1 output
Bit 3
PWMC0: I/O or PWM0 control
0: I/O
1: PWM0 output
Bit 2
PFDC: I/O or PFD control
0: I/O
1: PFD output
Bit 1
LXTLP: LXT oscillator low power control function
0: LXT oscillator start-up mode
1: LXT oscillator Low Power mode
Bit 0
CLKMOD: system clock mode selection.
0: High speed - HIRC/ERC/HXT used as system clock
1: Low speed - LXT used as system clock, internal HIRC/ERC/HXT stopped.
Note:
If PWM0/1/2 output is selected by PWMC0/1/2 bit, fTP comes always from fSYS.
(fTP is the clock source for timer0/2 , time base and PWM)
· CTRL1 Register
Bit
76543210
Name
INTEG1
INTEG0
TBSEL1
TBSEL0
WDTEN3
WDTEN2
WDTEN1
WDTEN0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
10001010
Bit 7, 6
INTEG1, INTEG0: External interrupt edge type
00: disable
01: rising edge trigger
10: falling edge trigger
11: dual edge trigger
Bit 5, 4
TBSEL1, TBSEL0: Time base period selection
00: 2
10 ´ (1/fTP)
01: 2
11 ´ (1/fTP)
10: 2
12 ´ (1/fTP)
11: 2
13 ´ (1/fTP)
Bit 3~0
WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable
1010: WDT disabled
Other values: WDT enabled - Recommended value is 0101
If the
²watchdog timer enable² is configuration option is selected, then the watchdog timer will
always be enabled and the WDTEN3~WDTEN0 control bits will have no effect.
Note:
The WDT is only disabled when both the WDT configuration option is disabled and when bits
WDTEN3~WDTEN0=1010.
The WDT is enabled when either the WDT configuration option is enabled or when bits
WDTEN3~WDTEN0
¹1010.



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