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HT95R45 Datasheet(PDF) 47 Page - Holtek Semiconductor Inc |
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HT95R45 Datasheet(HTML) 47 Page - Holtek Semiconductor Inc |
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47 / 76 page ![]() HT95R45 Rev. 1.00 47 March 12, 2010 Idle Mode When the device enters this mode, the normal operating current, will be reduced to an extremely low standby cur- rent level. This occurs because when the device enters the Power Down Mode, both the HCLK and 32768Hz system oscillators are stopped which reduces the power consumption to extremely low levels, however, as the device maintains its present internal condition, it can be woken up at a later stage and continue running, without requiring a full reset. This feature is extremely important in application areas where the microcontroller must have its power supply constantly maintained to keep the device in a known condition but where the power supply capacity is limited such as in battery applications. Sleep Mode In the Sleep Mode is similar to the mode, except here the 32768Hz oscillator continues running after after the HALT instruction has been executed. This feature en- ables the device to continue with instruction execution immediately after wake-up. Green Mode In the Green Mode, the 32768Hz oscillator is used as the system clock for instruction execution. The following conditions will force the microcontroller enter the Green Mode: · Any reset condition from any operational mode · Any interrupt occurring during the Sleep Mode or Idle mode · A Port A Wake-up from the Sleep Mode or Idle Mode Normal Mode In the Normal mode the device uses the HCLK gener- ated by the frequency-up conversion circuit as the sys- tem clock for instruction execution. There are four high frequency HCLK system clock se- lections which are 3.58MHz, 7.16MHz, 10.74MHz and 14.32MHz. When the system is in the Normal Mode care must be taken when dynamically changing the HCLK system clock, and for which the following proce- dure is recommended: 1. Clear bit MODE1 to ²0² to select the Slow Mode 2. Clear UPEN bit to ²0² 3. Program the MODE_1 register bits to select the required HCLK frequency 4. Set the UPEN bit to ²1² 5. Implement a 20ms software delay to allow the high frequency clock to stabilise 6. Set the MODE1 bit to ²1² to select the HCLK system clock After step 6 above is executed the system clock will be changed to that defined in the MODE_1 register. Changing the Operational Mode Holtek ¢s telephone controllers support two system clocks and four operational modes. The system clock can be either 32768Hz or HCLK and the operational mode can be either Normal, Green, Sleep or Idle mode. The operation mode is selected using software in the following way: · Normal mode to Green mode: Clear bit MODE1 to ²0², which will change the opera- tional mode to the Green mode. The UPEN bit status is not changed. However, the UPEN bit can be cleared by software. · Normal mode or Green mode to Sleep mode: Step 1: Clear bit MODE0 to ²0² Step 2: Clear bit MODE1 to ²0² Step 3: Clear bit UPEN to ²0² Step 4: Execute the HALT instruction After Step 4, the operational mode will be changed to the Sleep mode. · Normal mode or Green mode to Idle Mode: Step 1: Set bit MODE0 to ²1² Step 2: Clear bit MODE1 to ²0² Step 3: Clear bit UPEN to ²0² Step 4: Execute the HALT instruction After Step 4, the operational mode will be changed to the Idle Mode. · Green Mode to Normal Mode: Step 1: Set bit UPEN to ²1² Step 2: Execute a 20ms software delay Step 3: Set bit MODE1 to ²1² After Step 3, the operational mode will be changed to the Normal mode. · Sleep mode or Idle mode to Green mode: Method 1: The occurrence of any reset condition Method 2: Any active interrupt Method 3: A Port A wake-up Note that a Timer/Event Counter 0/1 and RTC interrupt will not be generated when in the Idle mode as the 32768Hz crystal oscillator is stopped. |
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