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MAC7200 Datasheet(PDF) 307 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 307 Page - Freescale Semiconductor, Inc

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The SPP DMA Controller Module (SPP_DMA2)
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
229
Figure 12-23 and Table 12-27 define word 6 of the TCDn structure, the dlast_sga field.
Figure 12-24 and Table 12-28 define word 7 of the TCDn structure, the biter and control/status fields.
24–16
citer[8:0]
Current “major” iteration count. This 9 or 15-bit count represents the current major loop count for the channel. It is
decremented each time the minor loop is completed and updated in the transfer control descriptor memory. Once
the major iteration count is exhausted, the channel performs a number of operations (e.g., final source and
destination address calculations), optionally generating an interrupt to signal channel completion before reloading
the citer field from the beginning iteration count (biter) field. When the citer field is initially loaded by software, it
must be set to the same value as that contained in the biter field. If the channel is configured to execute a single
service request, the initial values of biter and citer should be 0x0001.
15–0
doff[15:0]
Destination address signed offset. Sign-extended offset applied to the current destination address to form the
next-state value as each destination write is completed.
Register address: DMA_Offset + 0x1000 + (32 x n) + 0x18
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
dlast_sga[31:16]
W
Reset
————————————————
15
14
13
12
11
10
9876543210
R
dlast_sga[15:00]
W
Reset
————————————————
= Unimplemented
Figure 12-23. TCDn Word 6 (TCDn.dlast_sga) Field
Table 12-27. TCDn Word 6 (TCDn.dlast_sga) Field Descriptions
Field
Description
31–0
dlast_sga
[31:0]
Last destination address adjustment or the memory address for the next transfer control descriptor to be loaded
into this channel (scatter/gather). If (TCD.e_sg = 0) then
Adjustment value added to the destination address at the completion of the outer major iteration count. This value
can be applied to “restore” the destination address to the initial value, or adjust the address to reference the next
data structure.
else
This address points to the beginning of a 0-modulo-32 region containing the next transfer control descriptor to be
loaded into this channel. This channel reload is performed as the major iteration count completes. The
scatter/gather address must be 0-modulo-32, else a configuration error is reported.
Table 12-26. TCDn Word 5 (TCDn.{doff,citer}) Field Descriptions (Continued)
Field
Description



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