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MAC7200 Datasheet(PDF) 142 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 142 Page - Freescale Semiconductor, Inc |
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142 / 976 page ![]() Clock Generation MAC7200 Microcontroller Family Reference Manual, Rev. 2 64 Freescale Semiconductor 5.2.1.1 ALC 1:1 Mode In this mode, the system clock is fed from the Oscillator, and the PLL is bypassed. Refer to Figure 5-4. XCLKS = 1 PLLSEL = 0 (PLL is bypassed) Eqn. 5-1 Eqn. 5-2 Figure 5-4. ALC 1:1 Mode Clock Path 5.2.1.2 ALC PLL Mode In this mode, the system clock is fed from the Oscillator, and the PLL is enabled. Refer to Figure 5-5. XCLKS = 1 PLLSEL = 1 (PLL is not bypassed) Eqn. 5-3 Eqn. 5-4 SystemClock OSCCLOCK = PeripheralBusClock SystemClock 2 ----------------------------------- OSCCLK 2 ------------------------- == OSC EXTAL OSCCLK 0 1 XTAL PLL PLLSEL PLLCLK System Clock CRG ÷2 Peripheral Bus Clock SystemClock PLLCLK =2 OSCCLK SYNR 1 + REFDV 1 + ------------------------------ × × = PeripheralBusClock SystemClock 2 ----------------------------------- PLLCLK 2 ------------------------ == |
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