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MAC7200 Datasheet(PDF) 184 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 184 Page - Freescale Semiconductor, Inc

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Normal Single Chip Mode
MAC7200 Microcontroller Family Reference Manual, Rev. 2
106
Freescale Semiconductor
•
External Bus Interface is enabled
•
Flash main array access is enabled
•
Shadow Block access is enabled
•
Boot from the Flash main array
Table 9-1 shows the device memory map of the MAC72xx in Normal Single Chip Mode after Reset.
After Reset, the memory map may be re-mapped using the AAMR register in the MCM module. The
allowed combinations are shown in Table 9-2. The Peripheral Bus space is always fixed at $FC00 0000,
and is not re-mappable.
Table 9-1. Device Memory Map in Normal Single Chip Mode (After Reset)1
1. This reset memory map equates to a reset value of $f0d0 0b98 in the AAMR register in the MCM module.
Address
Module
Size
(Bytes)
$0000 0000 - $0007 FFFF
$0000 0000 - $0004 FFFF
Flash main array2 (MAC72x1)
Flash main array2 (MAC72x2)
2. The Exception Vector Table is located at $0000 0000 - $0000 001F in the Flash main array.
512K
320K
$00F0 0000 - $00F0 7FFF
Shadow Block
32K
$0008 0000 - $1FFF FFFF
Reserved
~511M
$2000 0000 - $3FFF FFFF
External Bus Interface
512M
$4000 0000 - $4000 7FFF
$4000 0000 - $4000 4FFF
SRAM3 (MAC72x1)
SRAM3 (MAC72x2)
3. The SRAM is mirrored across the entire 512MByte address range on a 32K boundary. Please refer to
Section 9.10, “SRAM Memory Map”.
32K
20K
$4000 8000 - $FBFF FFFF
Reserved
~3008M
$FC00 0000 - $FFFF FFFF
Peripheral Bus modules
64M
Table 9-2. Allowed Memory Maps in Normal Single Chip Mode
$0000 0000
$2000 0000
$4000 0000
AAMR Register
External Bus
Flash Main Array
SRAM
$f0d0 0b89
Unused
Flash Main Array
SRAM
$f0d0 0b80
SRAM
Flash Main Array
SRAM
$f0d0 0b8b
Flash Main Array
External Bus
SRAM
$f0d0 0b98
External Bus
External Bus
SRAM
$f0d0 0b99
Unused
External Bus
SRAM
$f0d0 0b90
SRAM
External Bus
SRAM
$f0d0 0b9b
Flash Main Array
Unused
SRAM
$f0d0 0b08
External Bus
Unused
SRAM
$f0d0 0b09
Unused
Unused
SRAM
$f0d0 0b00
SRAM
Unused
SRAM
$f0d0 0b0b
Flash Main Array
SRAM
SRAM
$f0d0 0bb8
External Bus
SRAM
SRAM
$f0d0 0bb9
Unused
SRAM
SRAM
$f0d0 0bb0
SRAM
SRAM
SRAM
$f0d0 0bbb



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