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Normal Primary Bootloader Mode

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

107

9.3

Normal Primary Bootloader Mode

Normal Primary Bootloader Mode is typically used to debug and develop application code, where a

software bootloader is required. Booting is performed from the Shadow Block, and all functionality,

except the External Bus, is available. In this mode, the following functionality is available:

•

Debug functionality (EICE, Nexus and the JTAG interface) is enabled

•

External Bus Interface is disabled

•

Flash main array access is enabled

•

Shadow Block access is enabled

•

Boot from the Shadow Block

Table 9-3 shows the device memory map of the system in both Normal and Secured Primary Bootloader

Mode after Reset. The memory map for this mode differs from the memory map in Normal Single Chip

Mode as follows:

•

The Shadow Block is mirrored to address $0000 0000. Note that the mirroring (rather than

relocating) of the Shadow Block means that it is available both at address $0000 0000 and at

address $20F0 0000.

•

The Flash Main Array is relocated to address $2000 0000

•

The External Bus Interface is not available

After Reset, the memory map may be re-mapped using the AAMR register in the MCM module. The

allowed combinations are shown in Table 9-4. The Peripheral Bus space is always fixed at $FC00 0000,

and is not re-mappable.

Table 9-3. Device Memory Map in Normal/Secured Primary Bootloader Mode (After Reset)1

1. This reset memory map equates to a reset value of $f0d0 0b80 in the AAMR register in the MCM module.

Address

Module

Size

(Bytes)

$0000 0000 - $0000 7FFF

Shadow Block2

2. The Shadow Block is available at both $0000 0000 and $20F0 0000.

32K

$0000 8000 - $1FFF FFFF

Reserved

~511M

$2000 0000 - $2007 FFFF

$2000 0000 - $2004 FFFF

Flash Main Array (MAC72x1)

Flash Main Array (MAC72x2)

512K

320K

$20F0 0000 - $20F0 7FFF

Shadow Block2

32K

$2008 0000 - $3FFF FFFF

Reserved

~511M

$4000 0000 - $4000 7FFF

$4000 0000 - $4000 4FFF

SRAM3 (MAC72x1)

SRAM3 (MAC72x2)

3. The SRAM is mirrored across the entire 512MByte address range on a 32K boundary. Therefore, the first

word in SRAM may be read from or written to using address $4000 0000 or address $4000 8000 or address

$4001 0000, etc.

32K

20K

$4000 8000 - $FBFF FFFF

Reserved

~3008M

$FC00 0000 - $FFFF FFFF

Peripheral Bus modules

64M

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