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MAC7200 Datasheet(PDF) 187 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 187 Page - Freescale Semiconductor, Inc

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Secured Single Chip Mode
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
109
After Reset, the memory map may be re-mapped using the AAMR register in the MCM module. The
allowed combinations are shown in Table 9-6. The Peripheral Bus space is always fixed at $FC00 0000,
and is not re-mappable.
9.5
Secured Single Chip Mode
Secured Single Chip Mode is typically used to execute application code in the final application, where a
software bootloader is not required. Booting is done from the Flash Main Array, with limited device
functionality. In this mode, the following functionality is available:
•
Debug functionality (EICE, Nexus and the JTAG interface) is disabled
— SC4 chain is still enabled
•
External Bus Interface is disabled
•
Flash main array access is enabled
•
Shadow Block access is enabled
•
Boot from the Flash main array
Table 9-7 shows the device memory map of the device in Secured Single Chip Mode after Reset. The
memory map for this mode differs from the memory map in Normal Single Chip Mode as follows:
•
The External Bus Interface is not available
2. The SRAM is mirrored across the entire 512MByte address range on a 32K boundary. Therefore, the first
word in SRAM may be read from or written to using address $4000 0000 or address $4000 8000 or address
$4001 0000, etc.
Table 9-6. Allowed Memory Maps in Normal Expanded Mode
$0000 0000
$2000 0000
$4000 0000
AAMR Register
External Bus
Flash Main Array
SRAM
$f0d0 0b89
Unused
Flash Main Array
SRAM
$f0d0 0b80
SRAM
Flash Main Array
SRAM
$f0d0 0b8b
Flash Main Array
External Bus
SRAM
$f0d0 0b98
External Bus
External Bus
SRAM
$f0d0 0b99
Unused
External Bus
SRAM
$f0d0 0b90
SRAM
External Bus
SRAM
$f0d0 0b9b
Flash Main Array
Unused
SRAM
$f0d0 0b08
External Bus
Unused
SRAM
$f0d0 0b09
Unused
Unused
SRAM
$f0d0 0b00
SRAM
Unused
SRAM
$f0d0 0b0b
Flash Main Array
SRAM
SRAM
$f0d0 0bb8
External Bus
SRAM
SRAM
$f0d0 0bb9
Unused
SRAM
SRAM
$f0d0 0bb0
SRAM
SRAM
SRAM
$f0d0 0bbb



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