CDCM61002

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SCAS870D – FEBRUARY 2009 – REVISED JULY 2010

TYPICAL OUTPUT PHASE NOISE CHARACTERISTICS (continued)

Over operating free-air temperature range (unless otherwise noted).

CDCM61002

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Phase noise at 100-Hz offset

–88

dBc/Hz

Phase noise at 1-kHz offset

–102

dBc/Hz

Phase noise at 10-kHz offset

–109

dBc/Hz

Phase noise at 100-kHz offset

–112

dBc/Hz

Phase noise at 1-MHz offset

–129

dBc/Hz

Phase noise at 10-MHz offset

–146

dBc/Hz

Phase noise at 20-MHz offset

–146

dBc/Hz

RMS phase jitter from 10 kHz to 20 MHz

510

fs, RMS

Total period jitter

27

ps, PP

Start-up time, power supply ramp time of 1 ms,

2.25

ms

final frequency accuracy of ±10 ppm

(3)

OUTPUT

LVCMOS OUTPUT

LVPECL OUTPUT

LVDS OUTPUT

FREQUENCY

(MHz)

INPUT (MHz)

62.5

25

592

32.9

611

20.7

667

28.4

75

25

518

27.5

533

19.4

572

25.7

77.76

24.8832

506

29.2

526

20.9

567

26.9

100

25

507

24.5

510

20.7

533

26.5

106.25

26.5625

535

23.5

524

20.2

553

26.5

125

25

557

39.6

556

21.4

570

27.1

150

25

518

38.4

493

18.9

515

26.2

155.52

24.8832

498

36.9

486

19.8

502

26.7

156.25

25

510

37.7

503

20.7

518

26.5

159.375

26.5625

535

37.4

510

19.9

534

26.3

187.5

25

506

32.8

506

20.3

509

25.5

200

25

491

23.3

492

30

499

34.9

212.5

26.5625

520

47.8

509

30.8

530

37.3

250

25

544

27.4

541

21.4

550

27.5

311.04

24.8832

481

20.5

496

24.7

312.5

25

501

20.8

508

25.8

622.08

24.8832

492

27.2

500

27.2

625

25

515

26.9

509

27

(1)

Figure 10, Figure 12, and Figure 14 show LVCMOS, LVPECL, and LVDS test setups (respectively) using appropriate quartz crystal in,

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