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TMS320DM6441 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320DM6441 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 232 page ![]() 2 Revision History TMS320DM6441 Digital Media System-on-Chip www.ti.com SPRS359D – SEPTEMBER 2006 – REVISED MARCH 2008 This data manual revision history highlights the technical changes made to the SPRS359C device-specific data manual to make it an SPRS359D revision. Scope: Applicable updates to the DM644x device family, specifically relating to the TMS320DM6441 device, have been incorporated. • Updated the C64x+ Megamodule Revision, JTAG BSDL_ID, and JTAG ID Register to include Silicon Revision 2.1 Table 2-1. TMS320DM6441 Revision History SEE ADDITIONS/MODIFICATIONS/DELETIONS Global • Updated/changed all C_WE instances from C_WE or CWEN or C_WEN" to "C_WE or CWE or C_WE"; C_WE is an active high signal Section 3.8.2 Figure 3-6, Device Nomenclature: Device and • Updated/changed the figure to include Silicon Revision 2.1 Development-Support Tool Nomenclature Section 4.2.1 Table 4-2, CHP_SHRTSW Register Field Descriptions: Power Configurations at • Updated/changed the DSPPWRON bit description for "0" and "1" Reset Section 7.10.1.2 Table 7-35, Switching Characteristics Over Recommended Operating Conditions for Asynchronous Memory EMIFA Eelctrical Cycles for EMIFA Module: Data/Timing Updated/changed the following parameter information: • Parameter NO. 4 tsu(EMCSL-EMOEL), Output setup time, EM_CS[5:2] low to EM_OE low (SS = 0) MAX value from "(RS + 1) * E + 1.2" to "(RS + 1) * E + 1.4" ns • Parameter NO. 5 th(EMOEH-EMCSH), Output hold time, EM_OE high to EM_CS[5:2] high (SS = 0) MIN value from "(RH + 1) * E - 1.3" to "(RH + 1) * E - 2.1" ns • Parameter NO. 5 th(EMOEH-EMCSH), Output hold time, EM_OE high to EM_CS[5:2] high (SS = 1) MIN value from "-1.4" to "-2.2" ns • Parameter NO. 7 th(EMOEH-EMBAIV), Output hold time, EM_OE high to EM_BA[1:0] invalid MIN value from "(RH + 1) * E - 2.1" to "(RH + 1) * E - 2.3" ns • Parameter NO. 9 th(EMOEH-EMAIV), Output hold time, EM_OE high to EM_A[21:0] invalid MIN value from "(RH + 1) * E - 2.4" to "(RH + 1) * E - 2.6" ns • Parameter NO. 17 th(EMWEH-EMCSH), Output hold time, EM_WE high to EM_CS[5:2] high (SS = 0) MIN value from "(WH + 1) * E - 1.4" to "(WH + 1) * E - 2.1" ns • Parameter NO. 17 th(EMWEH-EMCSH), Output hold time, EM_WE high to EM_CS[5:2] high (SS = 1) MIN value from "-1.4" to "-2.1" ns • Parameter NO. 21 th(EMWEH-EMBAIV), Output hold time, EM_WE high to EM_BA[1:0] invalid MIN value from "(WH + 1) * E - 2.2" to "(WH + 1) * E - 2.3" ns • Parameter NO. 23 th(EMWEH-EMAIV), Output hold time, EM_WE high to EM_A[21:0] invalid MIN value from "(WH + 1) * E - 2.5" to "(WH + 1) * E - 2.6" ns Section 7.11.2.3 Table 7-41, Timings for ATA/CF Module — Ultra DMA AC Timing: ATA/CF Ultra DMA • Updated/changed the MIN value of NO. 6, tDVS, Data valid OUTPUT setup time, data valid before STROBE Timing from "(UDMASTB)P - 3.3" to "(UDMASTB)P - 3.5" ns Section 7.11.2.4 Table 7-42, Timing Requirements for HDDIR: ATA/CF HDDIR Timing • Added a new MAX value of "2.1" ns to NO. 1 tc ,Cycle time, ATA_CS[1:0] to HDDIR low Section 7.13 Section 7.13, Video Processing Sub-System (VPSS) Overview: Video Processing • Added "Alternatively, if the VPBE input clock ..." sentence to the "To ensure the color sub-carrier frequency Sub-System (VPSS) ..." paragraph Overview Submit Documentation Feedback Revision History 7 |
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