TMS320DM6441 datasheet(13/232 Pages) TI

13 / 232 page

3.3.8.1 ARM Internal Memories

3.3.8.2 External Memories

3.3.8.3 DSP Memories

3.3.8.4 VICP Registers and Memories

3.3.8.5 ARM-DSP Integration

3.3.9

Peripherals

3.3.10 PLL Controller (PLLC)

TMS320DM6441

Digital Media System-on-Chip

www.ti.com

SPRS359D – SEPTEMBER 2006 – REVISED MARCH 2008

The ARM has access to the following ARM internal memories:

• 16KB ARM internal RAM on TCM interface, logically separated into two 8-KB pages to allow

simultaneous access on any given cycle if there are separate accesses for code (I-TCM bus) and data

(D-TCM) to the different memory regions.

• 8KB ARM internal ROM

The ARM has access to the following external memories:

• DDR2 synchronous DRAM

• Asynchronous EMIF / NOR flash / NAND flash

• ATA/CF

• Flash card devices:

–

MMC/SD with SDIO

–

Memory Stick/Memory Stick PRO

–

SmartMedia

The ARM has access to the following DSP memories:

• L2 RAM

• L1P RAM

• L1D RAM

The ARM has access to the registers and memories of the video/imaging coprocessor (VICP) subsystem.

DM6441 ARM and DSP integration features are as follows:

• DSP visibility from ARM’s memory map, see Section 3.5, Memory Map Summary, for details

• Boot modes for DSP - see Device Configurations section, Section 4.3.3, DSP Boot, for details

• ARM control of DSP boot / reset - see Device Configurations section, Section 4.3.2, ARM Boot, for

details

• ARM control of DSP isolation and powerdown / powerup - see Section 4, Device Configurations, for

details

• ARM & DSP Interrupts - see Section 7.7.1, ARM CPU Interrupts, and Section 7.7.2, DSP Interrupts, for

details

The ARM9 has access to all of the peripherals on the DM6441 device with the exception of the VICP.

The ARM subsystem includes the PLL controller. The PLL controller contains a set of registers for

configuring DM6441’s two internal PLLs (PLL1 and PLL2). The PLL controller provides the following

configuration and control:

• PLL bypass mode

• Set PLL multiplier parameters

• Set PLL divider parameters

• PLL power down

• Oscillator power down

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