S3C7031 datasheet(5/25 Pages) SAMSUNG

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S3C7031/7032

PRODUCT OVERVIEW

1-5

Table 1-1. S3C7031/7032 Pin Descriptions (Continued)

Pin Name

Pin Type

Description

Number

Share Pin

P2.0-P2.3

P3.0

P3.1

P3.2

P3.3

I/O

4-bit I/O port. 1-bit, 4-bit or 8-bit read/write and test is

possible. Pins are individually configurable as input

or output.

Pull-up resistors are individually assignable to input

pins by software and are automatically disabled for

output pins. Ports are software configurable as

n-channel open-drain outputs or push-pull output by

software.

Ports 2 and 3 can be paired to enable 8-bit data

transfer.

12-15

–-

SCK

BUZ

CLO

I/O

Eight frequency outputs

P0.0

TIO

I/O

External clock input or timer clock output

P0.1

INT1

I/O

External interrupts with rising or falling edge

detection

P0.2

KS0-KS3

I/O

Quasi-interrupts with falling edge detection

4-7

P1.0-P1.3

CIN0-CIN3

I/O

4-channel comparator input.

CIN0-CIN2: comparator input only.

CIN3: comparator input or external reference input

4-7

P1.0-P1.3

SCK

I/O

Serial interface clock signal

P3.0

I/O

Serial data output

P3.1

I/O

Serial data input

P3.2

BUZ

I/O

2 kHz, 4 kHz, 8 kHz, or 16 kHz frequency output at

4.19 MHz for buzzer sound

P3.3

XIN, XOUT

–-

Crystal, ceramic, or RC signal for system clock

9, 8

–-

RESET

Reset signal

–-

Power supply

–-

Ground

–-

Table 1-2. Overview of S3C7031/7032 Pin Data

Pin Numbers

Pin Names

Share Pins

I/O Type

Reset Value

Circuit Type

1-3

P0.0-P0.2

CLO, TIO, INT1

I/O

Input

4-7

P1.0-P1.3

KS0/CIN0-KS3/CIN3

I/O

Input

12-5

P2.0-P2.3

–

I/O

Input

16-19

P3.0-P3.3

SCK, SO, SI, BUZ

I/O

Input

RESET

–-

20, 10

DD, VSS

–-

9, 8

IN, XOUT

–-

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