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MSP430F5529 Datasheet(PDF) 87 Page - Texas Instruments |
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MSP430F5529 Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 115 page  P5.5/XOUT P5SEL.5 1 0 P5DIR.5 P5IN.5 EN ModuleXIN 1 0 ModuleXOUT P5OUT.5 1 0 DV SS DV CC P5REN.5 PadLogic 1 P5DS.5 0:Lowdrive 1:Highdrive D Bus Keeper toXT1 XT1BYPASS MSP430F551x MSP430F552x www.ti.com SLAS590D – OCTOBER 2009 – REVISED APRIL 2010 Table 54. Port P5 (P5.4 and P5.5) Pin Functions CONTROL BITS/SIGNALS(1) PIN NAME (P7.x) x FUNCTION P5DIR.x P5SEL.4 P5SEL.5 XT1BYPASS P5.4/XIN 4 P5.4 (I/O) I: 0; O: 1 0 X X XIN crystal mode(2) X 1 X 0 XIN bypass mode(2) X 1 X 1 P5.5/XOUT 5 P5.5 (I/O) I: 0; O: 1 0 X X XOUT crystal mode(3) X 1 X 0 P5.5 (I/O)(3) X 1 X 1 (1) X = Don't care (2) Setting P5SEL.4 causes the general-purpose I/O to be disabled. Pending the setting of XT1BYPASS, P5.4 is configured for crystal mode or bypass mode. (3) Setting P5SEL.4 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.5 can be used as general-purpose I/O. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 87 |
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