116A datasheet(65/102 Pages) RENESAS

65 / 102 page

REJ03B0297-0100

Rev.1.00

Page 65 of 99

Jul 16, 2010

R32C/116A Group

5. Electrical Characteristics

Note:

This value is applicable only when the main clock oscillation is stable.

Note:

This recovery time does not include the period until the main clock oscillator is stabilized. The CPU

starts operating before the oscillator is stabilized.

Figure 5.4

Clock Circuit Timing

Table 5.12

Electrical Characteristics of Oscillator

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ. Max.

fSO(PLL)

PLL clock self-oscillation frequency

MHz

tLOCK(PLL) PLL lock time (1)

1ms

tjitter(p-p)

PLL jitter period (p-p)

2.0

f(OCO)

On-chip oscillator frequency

62.5

125

250

kHz

Table 5.13

Electrical Characteristics of Clock Circuitry

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ. Max.

trec(WAIT) Recovery time from wait mode to low power mode

225

µs

trec(STOP) Recovery time from stop mode (1)

225

µs

t rec(STOP)

Interrupt for exiting

stop mode

CPU clock

Main clock oscillator

output

On-chip oscillator

output

Sub clock oscillator

output

On-chip oscillator

output

t rec(WAIT)

Interrupt for exiting

wait mode

CPU clock

Recovery time from stop mode

t rec(STOP)

Recovery time from wait mode

to low power mode

t rec(WAIT)

116A Datasheet(PDF) 65 Page - Renesas Technology Corp

116A Datasheet(HTML) 65 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL